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LTM9002IV-LA#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
LTM9002
4
9002f
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Logic Inputs (CLK, OE, ADCSHDN, MUX, CS/LD, SCK, SDI)
V
IH
High Level Input Voltage V
DD
= 3V
l
2V
V
IL
Low Level Input Voltage V
DD
= 3V
l
0.8 V
I
IN
Input Current V
IN
= 0V to V
DD
l
–10 10 μA
C
IN
Input Capacitance (Note 6) 3 pF
DIGITAL INPUTS AND OUTPUTS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution
l
12 Bits
Monotonicity
l
12 Bits
Full-Scale Range Internal Reference 1.5 V
Settling Time ±0.024% (±1LSB at 12 Bits),
No External Sense Capacitor
83.5 μs
AUXILIARY DAC CHARACTERISTICS
The l indicates specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. (Not applicable for LTM9002-LA) (Note 3)
DYNAMIC ACCURACY
The l indicates specifi cations which apply over the full operating temperature range,
otherwise specifi cations are at T
A
= 25°C. Input = –1dBFS. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio 70MHz Input (Both Channels), LTM9002-AA
140MHz Input (Both Channels), LTM9002-AA
l
61.5
66
66
dBFS
dBFS
15MHz Input (Channel A), LTM9002-LA
15MHz Input (Channel B), LTM9002-LA
l
l
67.7
68.5
69.9
71.1
dBFS
dBFS
SFDR Spurious Free Dynamic Range, 2nd or 3rd
Harmonic
70MHz Input (Both Channels), LTM9002-AA
140MHz Input (Both Channels), LTM9002-AA
l
67.5
82
76
dBc
dBc
15MHz Input (Channel A), LTM9002-LA
15MHz Input (Channel B), LTM9002-LA
l
l
75
72.7
86.2
85.5
dBc
dBc
SFDR Spurious Free Dynamic Range 4th or Higher 70MHz Input (Both Channels), LTM9002-AA
140MHz Input (Both Channels), LTM9002-AA
l
74.2
90
90
dBc
dBc
15MHz Input (Channel A), LTM9002-LA
15MHz Input (Channel B), LTM9002-LA
l
l
78.8
79.8
88.5
90.7
dBc
dBc
S/(N+D) Signal-to-Noise Plus Distortion Ratio 70MHz Input (Both Channels), LTM9002-AA
140MHz Input (Both Channels), LTM9002-AA
l
60.7
66
66
dBFS
dBFS
15MHz Input (Channel A), LTM9002-LA
15MHz Input (Channel B), LTM9002-LA
l
l
67.1
67.9
69.7
70.8
dBFS
dBFS
IMD3 Third Order Inter-Modulation Distortion;
1MHz Tone Spacing, Two Tones –7dBFS
70MHz Input, LTM9002-AA
140MHz Input, LTM9002-AA
77
73
dBc
dBc
15MHz Input, LTM9002-LA 77 dBc
Crosstalk 140MHz Input, LTM9002-AA –110 dB
15MHz Input, LTM9002-LA –110 dB
LTM9002
5
9002f
The l denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 7)
POWER REQUIREMENTS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
Amplifi er and Auxiliary DAC
Operating Supply Range
l
2.85 3.0 3.4 V
V
DD
ADC Analog Supply Voltage
l
2.85 3.0 3.5 V
O
VDD
Output Supply Voltage
l
0.5 3.0 3.6 V
I
CC
Amplifi er DAC Powered Up, Both Amplifi ers Enabled, LTM9002-AA
l
180 207 mA
Both Amplifi ers Enabled, LTM9002-LA
l
90 120 mA
I
CC(SHDN)
Amplifi er Shutdown Supply Current AMPSHDN = 3V, DAC Powered Down 0.7 mA
I
DD(ADC)
ADC Supply Current LTM9002-AA
l
263 313 mA
LTM9002-LA
l
140 159 mA
P
D(SHDN)
ADC Shutdown Power (Each Channel) ADCSHDN = AMPSHDN = 3V, OE = 3V, No CLK 2 mW
P
D(NAP)
ADC Nap Mode Power (Each Channel) ADCSHDN = AMPSHDN = 3V, OE = 0V, No CLK 15 mW
P
D(AMP)
Amplifi er Power Dissipation DAC Powered Up, LTM9002-AA 540 mW
LTM9002-LA 270 mW
P
D(ADC)
ADC Power Dissipation LTM9002-AA
l
790 939 mW
LTM9002-LA
l
420 477 mW
P
D(TOTAL)
Total Power Dissipation f
SAMPLE
= MAX, LTM9002-AA
f
SAMPLE
= MAX, LTM9002-LA
1329
690
mW
mW
DIGITAL INPUTS AND OUTPUTS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Logic Inputs (AMPSHDN)
V
IL
Low Level Input Voltage
l
0.8 V
V
IH
High Level Input Voltage
l
2.4 V
I
IL
Input Low Current AMPSHDN = 0.8V
l
0.5 μA
I
IH
Input High Current AMPSHDN = 2.4V
l
1.4 3 μA
Logic Outputs
OV
DD
= 3V
C
OZ
Hi-Z Output Capacitance OE = 3V (Note 6) 3 pF
I
SOURCE
Output Source Current V
OUT
= 0V 50 mA
I
SINK
Output Sink Current V
OUT
= 3V 50 mA
V
OH
High Level Output Voltage I
O
= –10μA
I
O
= –200μA l 2.7
2.995
2.99
V
V
V
OL
Low Level Output Voltage I
O
= 10μA
I
O
= 1.6mA l
0.005
0.09 0.4
V
V
OV
DD
= 2.5V
V
OH
High Level Output Voltage I
O
= –200μA 2.49 V
V
OL
Low Level Output Voltage I
O
= 1.6mA 0.09 V
OV
DD
= 1.8V
V
OH
High Level Output Voltage I
O
= –200μA 1.79 V
V
OL
Low Level Output Voltage I
O
= 1.6mA 0.1 V
LTM9002
6
9002f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: OV
DD
= V
CC
= V
DD
= 3V, f
SAMPLE
= MAX, input range = V
IN
with differential drive, CLKA = CLKB, V
INCM
= 1.25V, AMPSHDN =
ADCSHDN = 0V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
S
Sampling Frequency LTM9002-AA
l
1 125 MHz
LTM9002-LA
l
1 65 MHz
t
L
CLK Low Time Duty Cycle Stabilizer Off (Note 6), LTM9002-AA
Duty Cycle Stabilizer On (Note 6), LTM9002-AA
l
l
3.8
3
4
4
500
500
ns
ns
t
H
CLK High Time Duty Cycle Stabilizer Off (Note 6), LTM9002-AA
Duty Cycle Stabilizer On (Note 6), LTM9002-AA
l
l
3.8
3
4
4
500
500
ns
ns
t
L
CLK Low Time Duty Cycle Stabilizer Off (Note 6), LTM9002-LA
Duty Cycle Stabilizer On (Note 6), LTM9002-LA
l
l
7.3
5
7.7
7.7
500
500
ns
ns
t
H
CLK High Time Duty Cycle Stabilizer Off (Note 6), LTM9002-LA
Duty Cycle Stabilizer On (Note 6), LTM9002-LA
l
l
7.3
5
7.7
7.7
500
500
ns
ns
t
AP
Absolute Aperture Delay 0ns
t
D
CLK to DATA Delay C
L
= 5pF (Note 6)
l
1.4 2.7 5.4 ns
t
C
CLK to CLKOUT Delay C
L
= 5pF (Note 6)
l
1.4 2.7 5.4 ns
DATA to CLKOUT Skew (t
D
– t
C
) (Note 6)
l
–0.6 0 0.6 ns
t
MD
MUX to DATA Delay C
L
= 5pF (Note 6)
l
1.4 2.7 5.4 ns
DATA Access Time After OE↓
C
L
= 5pF (Note 6)
l
4.3 10 ns
BUS Relinquish Time (Note 6)
l
3.3 8.5 ns
Pipeline Latency 5 Cycles
SPI Interface for Aux DACs, V
DD
= 2.7V to 3.6V
t
1
SDI Valid to SCK Setup 4 ns
t
2
SDI Valid to SCK Hold 4 ns
t
3
SCK High Time 9ns
t
4
SCK Low Time 9ns
t
5
CS/LD Pulse Width 10 ns
t
6
LSB SCK High to CS/LD 7 ns
t
7
CS/LD Low to SCK High 7 ns
t
10
CS/LD High to SCK Positive Edge 7 ns
SCK Frequency 50% Duty Cycle 50 MHz
The l denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T
A
= 25°C. (Note 6) (Not applicable for LTM9002-LA)
TIMING CHARACTERISTICS
Note 4: Integral nonlinearity is defi ned as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 5: Offset error is the output code resulting when the inputs are
shorted together. The output code is converted to millivolts.
Note 6: Guaranteed by design, not subject to test.
Note 7: V
DD
= 3V, f
SAMPLE
= MAX, input range = V
IN
with differential drive.
The supply current and power dissipation are the sum total for both
channels with both channels active.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

LTM9002IV-LA#PBF

Mfr. #:
Buy LTM9002IV-LA#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-bit, Dual IF/Baseband Receiver Module, 65Msps, DC-25MHz LPF, 8dB/20dB gain, no trim DAC
Lifecycle:
New from this manufacturer.
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