CY7C1051H
8-Mbit (512K Words × 16 Bit) Static RAM
with Error-Correcting Code (ECC)
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 002-03314 Rev. *C Revised November 27, 2017
8-Mbit (512K Words × 16 Bit) Static RAM with Error-Correcting Code (ECC)
Features
High speed
t
AA
= 10 ns
Embedded error-correcting code (ECC) for single-bit error
correction
Low active and standby currents
I
CC
= 90-mA typical at 100 MHz
I
SB2
= 20-mA typical
Operating voltage range: 2.2 V to 3.6 V.
1.0-V data retention
Transistor-transistor logic (TTL) compatible inputs and outputs
Available in Pb-free 44-pin TSOP II package
Functional Description
CY7C1051H is a high-performance CMOS fast static RAM
device with embedded ECC
[1]
.
To access device, assert the chip enable (CE) input LOW. To
perform data writes, assert the Write Enable (WE) input LOW,
and provide the data and address on the device data pins (I/O
0
through I/O
15
) and address pins (A
0
through A
18
) respectively.
The Byte High Enable (BHE) and Byte Low Enable (BLE) inputs
control byte writes, and write data on the corresponding I/O lines
to the memory location specified. BHE
controls I/O
8
through
I/O
15
and BLE controls I/O
0
through I/O
7
.
To perform data reads, assert the Output Enable (OE
) input and
provide the required address on the address lines. Read data is
accessible on I/O lines (I/O
0
through I/O
15
). You can perform
byte accesses by asserting the required byte enable signal (BHE
or BLE) to read either the upper byte or the lower byte of data
from the specified address location.
All I/Os (I/O
0
through I/O
15
) are placed in a high-impedance state
when the device is deselected (CE HIGH), or control signals are
de-asserted (OE, BLE, BHE).
See the Truth Table on page 13 for a complete description of
read and write modes.
The logic block diagrams are provided on page 2.
The CY7C1051H is available in 44-pin TSOP II package.
For a complete list of related documentation, click here.
Product Portfolio
Product
Features and Options
(see Pin Configurations
on page 4)
Range
V
CC
Range
(V)
Speed
(ns)
Current Consumption
Operating I
CC
, (mA)
Standby, I
SB2
(mA)
f = f
max
Typ
[2]
Max Typ
[2]
Max
CY7C1051H30 Single chip enables Industrial 2.2 V–3.6 V 10 90 110 20 30
Notes
1. This device does not support automatic write-back on error detection.
2. Typical values are included only for reference and are not guaranteed or tested. Typical values are measured at V
CC
= 3 V (for a V
CC
range of 2.2 V–3.6 V) T
A
= 25 °C.
Document Number: 002-03314 Rev. *C Page 2 of 18
CY7C1051H
Logic Block Diagram – CY7C1051H
MEMORY
ARRAY
ROWDECODER
A1
A2
A3
A4
A5
A6
A7
A8
A9
A0
COLUMNDECODER
A10
SENSE
AMPLIFIERS
ECCDECODER
A11
A12
A13
A14
A15
A16
A17
ECCENCODER INPUTBUFFER
I/O
0
I/O
7
I/O
8
I/O
15
BHE
WE
OE
BLE
CE
A18
Document Number: 002-03314 Rev. *C Page 3 of 18
CY7C1051H
Contents
Pin Configurations ........................................................... 4
Maximum Ratings .............................................................5
Operating Range ............................................................... 5
DC Electrical Characteristics ..........................................5
Capacitance ......................................................................6
Thermal Resistance ..........................................................6
AC Test Loads and Waveforms .......................................6
Data Retention Characteristics ....................................... 7
Data Retention Waveform ................................................ 7
AC Switching Characteristics .........................................8
Switching Waveforms ...................................................... 9
Truth Table ......................................................................13
Ordering Information ......................................................14
Ordering Code Definitions ......................................... 14
Package Diagram ............................................................ 15
Acronyms ........................................................................ 16
Document Conventions ................................................. 16
Units of Measure ....................................................... 16
Document History Page ................................................. 17
Sales, Solutions, and Legal Information ...................... 18
Worldwide Sales and Design Support ....................... 18
Products .................................................................... 18
PSoC®Solutions ....................................................... 18
Cypress Developer Community ................................. 18
Technical Support ..................................................... 18

CY7C1051H30-10ZSXIT

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM Async SRAMS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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