9DB1200C
Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM
14
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Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
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© 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks
are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
Revision History
Rev. Issue Date Description Page #
A 12/18/2007
1. Updated SMBus Serial Interface Information.
2. Release to Final. 10
B 4/7/2008 Added Input Clock Parameters 6
C 8/28/2008
1. Updated Phase Jitter Numbers
2. Added PLL BW and jitter peaking specs
3. Added input to output delay specs
5. Updated stabilization time to 1.8ms from 1.0ms
D 9/15/2009
1. Corrected pin number references in SMBus Bytes 1 and 3
2. Added typical values to phase jitter table. Various
E 11/4/2009 Changed CLK Stabilization spec from 1.0 to 1.8 ms 5
F 7/1/2010 Corrected power groups table for input clock, 2
G 8/15/2012 Updated Byte 5 VENDOR ID (bits 3 through 0) from 0001 to 0010 12
