1
©2014 Integrated Device Technology, Inc.
AUGUST 2014
DSC-4839/6
I/O
Control
Address
Decoder
128Kx8
MEMORY
ARRAY
7009
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
0L
OE
L
R/W
L
A
16L
A
0L
I/O
0-7L
SEM
L
INT
L
(2)
BUSY
L
(1,2)
R/W
L
CE
0L
OE
L
I/O
Control
Address
Decoder
OE
R
R/W
R
CE
0R
A
16R
A
0R
I/O
0-7R
SEM
R
INT
R
(2)
R
BUSY
(1,2)
M/S
(1)
CE
1L
R/W
R
CE
0R
OE
R
CE
1R
4839 drw 01
1L
CE
1R
CE
17 17
Functional Block Diagram
M/S = VIH for BUSY output flag on Master,
M/S = VIL for BUSY input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 5V (±10%) power supply
Available in a 100-pin TQFP
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Features
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
Commercial: 15/20ns (max.)
Industrial: 20ns (max.)
Low-power operation
IDT7009L
Active: 1W (typ.)
Standby: 1mW (typ.)
Dual chip enables allow for depth expansion without
external logic
IDT7009 easily expands data bus width to 16 bits or
more using the Master/Slave select when cascading more
than one device
HIGH-SPEED
128K x 8 DUAL-PORT
STATIC RAM
IDT7009L
NOTES:
1. BUSY is an input as a Slave (M/S = V
IL) and an output when it is a Master (M/S = VIH).
2. BUSY and INT are non-tri-state totem-pole outputs (push-pull).
2
IDT7009L
High-Speed 128K x 8 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Description
The IDT7009 is a high-speed 128K x 8 Dual-Port Static RAM. The
IDT7009 is designed to be used as a stand-alone 1024K-bit Dual-Port
RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-
more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM
approach in 16-bit or wider memory system applications results in full-
speed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by the chip enables (CE
0 and CE1) permit the on-chip
circuitry of each port to enter a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only1W of power.
The IDT7009 is packaged in a 100-pin Thin Quad Flatpack (TQFP).
NOTES:
1. All Vcc pins must be connected to power supply.
2. All GND pins must be connected to ground.
3. Package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part marking.
Pin Configurations
(1,2,3)
6.42
IDT7009L
High-Speed 128K x 8 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
3
Pin Names
Left Port Right Port Names
CE
0L
, CE
1L
CE
0R
, CE
1R
Chip Enables
R/W
L
R/W
R
Read/Write Enable
OE
L
OE
R
Output Enable
A
0L
- A
16L
A
0R
- A
16R
Address
I/O
0L
- I/O
7L
I/O
0R
- I/O
7R
Data Input/Output
SEM
L
SEM
R
Semaphore Enable
INT
L
INT
R
Interrupt Flag
BUSY
L
BUSY
R
Busy Flag
M/S Master or Slave Select
V
CC
Power
GND Ground
4839 tbl 01
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV represents the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V.
Capacitance
(TA = +25°C, f = 1.0MHz) (TQFP Only)
Absolute Maximum Ratings
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. V
TERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to
< 20mA for the period of VTERM > Vcc + 10%.
NOTES:
1. V
IL > -1.5V for pulse width less than 10ns.
2. V
TERM must not exceed Vcc + 10%.
Recommended DC Operating
Conditions
NOTES:
1. This is the parameter T
A. This is the "instant on" case temperature.
Maximum Operating Temperature
and Supply Voltage
Symbol Rating Commercial
& Industrial
Military Unit
V
TE RM
(2 )
Terminal Voltage
with Respect
to GND
-0.5 to +7.0 -0.5 to +7.0 V
T
BIAS
Temperature
Under Bias
-55 to +125 -65 to +135
o
C
T
STG
Storage
Temperature
-65 to +150 -65 to +150
o
C
I
OUT
DC Output Current 50 50 mA
4839 tbl 02
Grade
Ambient
Temperature
(2 )
GND Vcc
Military -55
O
C to +125
O
C0V 5.0V
+
10%
Commercial 0
O
C to +70
O
C0V 5.0V
+
10%
Industrial -40
O
C to +85
O
C0V 5.0V
+
10%
4839 tbl 03
Symbol Parameter Min. Typ. Max. Unit
V
CC
Supply Voltage 4.5 5.0 5.5 V
GND Ground 0 0 0 V
V
IH
Input High Voltage 2.2
____
6.0
(2 )
V
V
IL
Input Low Voltage -0.5
(1 )
____
0.8 V
4839 tbl 04
Symbol Parameter
(1 )
Conditions
(2)
Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 9 pF
C
OUT
Output Capacitance V
OUT
= 3dV 10 pF
4839 tbl 05

7009L20PFG

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 128K X 8 5V ASYNC DPRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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