DAC8143
–12–
REV. C
DAC8143 INTERFACE TO THE 8085
The DAC8143’s interface to the 8085 microprocessor is shown
in Figure 22. Note that the microprocessor’s SOD line is used
to present data serially to the DAC.
Data is strobed into the DAC8143 by executing memory write
instructions. The strobe 2 input is generated by decoding an
address location and WR. Data is loaded into the DAC register
with a memory write instruction to another address location.
Serial data supplied to the DAC8143 must be present in the
right-justified format in registers H and L of the microprocessor.
STB
1
DAC8143*
SRI
SRO
LD
2
LD
1
STB
3
STB
2
STB
4
CLR
74LS138
ADDRESS
DECODER
A
0
A
2
E
1
E
3
E
2
WR
ALE
SOD
8085
ADDRESS BUS (16)
DATA
+5V
FROM SYSTEM RESET
*ANALOG CIRCUITRY OMITTED FOR SIMPLICITY
+5V
A
0
–A
15
8212
(8)
(8)
AD
0–7
Figure 22. DAC8143—8085 Interface
DAC8143 INTERFACE TO THE 68000
Figure 23 shows the DAC8143 configured to the 68000 micro-
processor. Serial data input is similar to that of the 6800 in
Figure 21.
STB
1
DAC8143
SRI
LD
2
LD
1
STB
3
STB
4
CLR
ADDRESS
DECODER
A
1
A
23
AS
DB
15
DB
0
68000mP
ADDRESS BUS
DATA BUS
FROM SYSTEM RESET
CS
VMA
VPA
UDS
+5V
1/4 74HC125
+
STB
2
Figure 23. DAC8143 to 68000
µ
P Interface
OUTLINE DIMENSIONS
Dimensions are shown in inches and (mm).
16-Lead Plastic DIP
(N-16)
16
18
9
PIN 1
0.840 (21.34)
0.745 (18.92)
0.280 (7.11)
0.240 (6.10)
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.022 (0.558)
0.014 (0.356)
0.160 (4.06)
0.115 (2.93)
0.100
(2.54)
BSC
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
16-Lead SOIC
(R-16W)
SEATING
PLANE
0.0118 (0.30)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.1043 (2.65)
0.0926 (2.35)
0.050 (1.27)
BSC
16 9
81
0.4193 (10.65)
0.3937 (10.00)
0.2992 (7.60)
0.2914 (7.40)
PIN 1
0.4133 (10.50)
0.3977 (10.00)
0.0125 (0.32)
0.0091 (0.23)
88
08
0.0291 (0.74)
0.0098 (0.25)
3 458
0.0500 (1.27)
0.0157 (0.40)
C3114c–2–3/99
PRINTED IN U.S.A.
