89HPES10T4G2ZBBCG8 Datasheet 89HPES10T4G2ZBBCG, 89HPES10T4G2ZBBCGI, 89HPES10T4G2ZBBCG8 | P16-P18

16 of 30 May 10, 2016

IDT 89HPES10T4G2 Data Sheet

DC Electrical Characteristics

Values based on systems running at recommended supply voltages, as shown in Table 13.

Note: See Table 8, Pin Characteristics, for a complete I/O listing.

I/O Type Parameter Description

Gen1 Gen2 Unit

Condi-

tions

Min

Typ

Max

Min

Typ

Max

Serial Link PCIe Transmit

TX-DIFFp-p

Differential peak-to-peak output

voltage

800 1200 800 1200 mV

TX-DIFFp-p-LOW

Low-Drive Differential Peak to

Peak Output Voltage

400 1200 400 1200 mV

TX-DE-RATIO-

3.5dB

De-emphasized differential output

voltage

-3 -4 -3.0 -3.5 -4.0 dB

TX-DE-RATIO-

6.0dB

De-emphasized differential output

voltage

NA -5.5 -6.0 -6.5 dB

TX-DC-CM

DC Common mode voltage 0 3.6 0 3.6 V

TX-CM-ACP

RMS AC peak common mode

output voltage

20 mV

TX-CM-DC-active-

idle-delta

Abs delta of DC common mode

voltage between L0 and idle

100 100 mV

TX-CM-DC-line-

delta

Abs delta of DC common mode

voltage between D+ and D-

25 25 mV

TX-Idle-DiffP

Electrical idle diff peak output 20 20 mV

TX-DIFF

Transmitter Differential Return

loss

10 10 dB 0.05 - 1.25GHz

8 dB 1.25 - 2.5GHz

TX-CM

Transmitter Common Mode

Return loss

66dB

TX-DIFF-DC

DC Differential TX impedance 80 100 120 120 

VTX-CM-ACpp Peak-Peak AC Common NA 100 mV

TX-DC-CM

Transmit Driver DC Common

Mode Voltage

0 3.6 0 3.6 V

TX-RCV-DETECT

The amount of voltage change

allowed during Receiver Detec-

tion

600 600 mV

TX-SHORT

Transmitter Short Circuit Current

Limit

090 90mA

Table 18 DC Electrical Characteristics (Part 1 of 2)

17 of 30 May 10, 2016

IDT 89HPES10T4G2 Data Sheet

Serial Link

(cont.)

PCIe Receive

RX-DIFFp-p

Differential input voltage (peak-to-

peak)

175 1200 120 1200 mV

RX-DIFF

Receiver Differential Return Loss 10 10 dB 0.05 - 1.25GHz

8 1.25 - 2.5GHz

RX-CM

Receiver Common Mode Return

Loss

66dB

RX-DIFF-DC

Differential input impedance (DC) 80 100 120 Refer to return loss spec 

RX--DC

DC common mode impedance 40 50 60 40 60 

RX-COMM-DC

Powered down input common

mode impedance (DC)

200k 350k 50k 

RX-HIGH-IMP-DC-

POS

DC input CM input impedance for

V>0 during reset or power down

50k 50k 

RX-HIGH-IMP-DC-

NEG

DC input CM input impedance for

V<0 during reset or power down

1.0k 1.0k 

RX-IDLE-DET-

DIFFp-p

Electrical idle detect threshold 65 175 65 175 mV

RX-CM-ACp

Receiver AC common-mode peak

voltage

150 150 mV V

RX-CM-ACp

PCIe REFCLK

Input Capacitance 1.5 — 1.5 — pF

Other I/Os

LOW Drive

Output

—2.5——2.5—mAV

= 0.4v

—-5.5— —-5.5 — mAV

= 1.5V

High Drive

Output

— 12.0 — — 12.0 — mA V

= 0.4v

— -20.0 — — -20.0 — mA V

= 1.5V

Schmitt Trig-

ger Input

(STI)

-0.3 — 0.8 -0.3 — 0.8 V —

2.0 — V

I/O +

0.5

2.0 — V

I/O +

0.5

V—

Input V

-0.3 — 0.8 -0.3 — 0.8 V —

2.0 — V

I/O +

0.5

2.0 — V

I/O +

0.5

V—

Capacitance C

——8.5——8.5pF —

Leakage Inputs — — +

10 — — + 10 AV

I/O (max)

I/O

LEAK W/O

Pull-ups/downs

——+

10 — — + 10 AV

I/O (max)

I/O

LEAK WITH

Pull-ups/downs

——+

80 — — + 80 AV

I/O (max)

Minimum, Typical, and Maximum values meet the requirements under PCI Specification 2.0.

I/O Type Parameter Description

Gen1 Gen2 Unit

Condi-

tions

Min

Typ

Max

Min

Typ

Max

Table 18 DC Electrical Characteristics (Part 2 of 2)

18 of 30 May 10, 2016

IDT 89HPES10T4G2 Data Sheet

Package Pinout — 324-BGA Signal Pinout for PES10T4G2

The following table lists the pin numbers and signal names for the PES10T4G2 device.

Pin Function Alt Pin Function Alt Pin Function Alt Pin Function Alt

A1 V

B17 SWMODE_1 D15 GPIO_01 1 F13 V

A2 V

B18 SWMODE_2 D16 PE4TP00 F14 V

CORE

A3 PE0RN00 C1 JTAG_TCK D17 V

PETA F15 V

I/O

A4 PE0RP00 C2 PE0TP00 D18 GPIO_03 F16 V

A5 V

C3 PE0TN00 E1 V

F17 V

PEA

A6 PE0RN01 C4 V

E2 V

PEA F18 PE4RP00

A7 PE0RP01 C5 PE0TP01 E3 NC G1 V

A8 V

C6 PE0TN01 E4 JTAG_TMS G2 V

PEA

A9 PEREFCLKP0 C7 V

PEA E5 V

CORE G3 V

PETA

A10 PEREFCLKN0 C8 V

PETA E6 V

I/O G4 V

A11 V

C9 V

E7 V

PEHA G5 V

CORE

A12 PE0RN02 C10 PE0TP02 E8 V

PEHA G6 V

I/O

A13 PE0RP02 C11 PE0TN02 E9 V

PEHA G7 V

A14 V

C12 V

PETA E10 V

CORE G8 V

A15 PE0RN03 C13 PE0TP03 E11 V

PEHA G9 V

CORE

A16 PE0RP03 C14 PE0TN03 E12 V

I/O G10 V

A17 CCLKDS C15 V

E13 V

CORE G11 V

A18 SWMODE_0 C16 CCLKUS E14 V

I/O G12 V

B1 JTAG_TDI C17 PERSTN E15 GPIO_00 1 G13 V

I/O

B2 V

C18 GPIO_02 1 E16 PE4TN00 G14 V

PEHA

B3 V

D1 V

E17 V

G15 V

B4 V

D2 JTAG_TDO E18 PE4RN00 G16 PE4TP01

B5 V

D3 V

PETA F1 V

G17 V

PETA

B6 V

D4 JTAG_TRST_N F2 V

PEHA G18 V

B7 V

D5 V

I/O F3 NC H1 V

B8 V

D6 V

PEHA F4 V

CORE H2 V

B9 V

PEA D7 V

F5 V

I/O H3 NC

B10 V

PEA D8 V

CORE F6 V

H4 V

B11 V

PETA D9 V

CORE F7 V

CORE H5 V

PEHA

B12 V

D10 REFRES0 F8 V

H6 V

B13 V

D11 V

PEA F9 V

H7 V

CORE

B14 V

CORE D12 V

CORE F10 V

H8 V

B15 V

D13 V

F11 V

H9 V

B16 V

PEA D14 RSTHALT F12 V

CORE H10 V

Table 19 PES10T4G2 324-pin Signal Pin-Out (Part 1 of 3)

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30

89HPES10T4G2ZBBCG8

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89HPES10T4G2ZBBCG8

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