6.42
IDT70825S/L
High-Speed 8K x 16 Sequential Access Random Access Memory Industrial and Commercial Temperature Ranges
5
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1,2,8)
(VCC = 5.0V ± 10%)
Data Retention Characteristics Over All Temperature Ranges
(L Version Only)
(VLC < 0.2V, VHC > VCC - 0.2V)
NOTES:
1. 'X' in part number indicates power rating (S or L).
2. V
CC = 5V, TA = +25°C; guaranteed by device characterization but not production tested.
3. At f = f
MAX, address, control lines (except Output Enable), and SCLK are cycling at the maximum frequency read cycle of 1/tRC.
4. f = 0 means no address or control lines change.
5. SCE may transition, but is LOW (SCE=V
IL) when clocked in by SCLK.
6. SCE may be - 0.2V, after it is clocked in, since SCLK=V
IH must be clocked in prior to powerdown.
7. If one port is enabled (either CE or SCE = LOW) then the other port is disabled (SCE or CE = HIGH, respectively). CMOS HIGH
> Vcc - 0.2V and LOW < 0.2V, and
TTL HIGH = V
IH and LOW = VIL.
8. Industrial temperature: for other speeds, packages and powers contact your sales office.
NOTES :
1. T
A = +25°C, VCC = 2V; guaranteed by device characterization but not production tested.
2. t
RC = Read Cycle Time
3. This parameter is guaranteed by device characterization, but is not production tested.
4. To initiate data retention, SCE = V
IH must be clocked in.
70825X20
Com'l Only
70825X25
Com'l Only
70825X35
Com'l Only
70825X45
Com'l Only
Symbol Parameter Test Condition Version Typ. Max. Typ. Max. Typ. Max. Typ. Max. Unit
I
CC
Dynamic Operating
Current
(Both Ports Active)
CE = V
IL
,
Outputs Disabled
SCE = V
IL
(5)
f = f
MAX
(3)
COM'L S
L
180
180
380
330
170
170
360
310
160
160
340
290
155
155
340
290
mA
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
SCE and CE >
V
IH
(7)
CMD = V
IH
f = f
MAX
(3)
COM'L S
L
25
25
70
50
25
25
70
50
20
20
70
50
16
16
70
50
mA
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE or SCE
= V
IH
Active Port Outputs Disabled,
f=f
MAX
(3)
COM'L S
L
115
115
260
230
105
105
250
220
95
95
240
210
90
90
240
210
mA
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports CE and
SCE >
V
CC
- 0.2V
(6,7)
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(4)
COM'L S
L
1.0
0.2
15
5
1.0
0.2
15
5
1.0
0.2
15
5
1.0
0.2
15
5
mA
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
One Port CE or
SCE >
V
CC
- 0.2V
(6)
Outputs Disabled (Active Port)
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
f = f
MAX
(3)
COM'L S
L
110
110
240
200
100
100
230
190
90
90
220
180
85
85
220
180
mA
3016 tbl 08a
Symbol Parameter Test Condition Min. Typ.
(1)
Max. Unit
V
DR
V
CC
for Data Retention V
CC
= 2V 2.0
___ ___
V
I
CCDR
Data Retention Current
CE >
V
HC
V
IN
= V
HC
or = V
LC
IND.
___
100 4000
µA
COM'L.
___
100 1500
t
CDR
(3)
Chip Deselect to Data Retention Time
SCE = V
HC
(4)
when SCLK = ↑
CMD = V
HC
___ ___ ___
V
t
R
(3)
Operation Recovery Time t
RC
(2)
___ ___
V
3016 tbl 09a
