CY28405
Document #: 38-07512 Rev. *B Page 13 of 19
VTT_PWRGD# = Low
Delay
>0.25mS
S1
Power Off
S0
VDDA = 2.0V
Sample
Inputs straps
S2
Normal
Operation
Wait for 1.146ms
Enable Outputs
S3
VTT_PWRGD# = toggle
VDDA = off
Figure 6. Clock Generator Power-up/Run State Diagram
[+] Feedback
CY28405
Document #: 38-07512 Rev. *B Page 14 of 19
Absolute Maximum Conditions
Parameter Description Condition Min. Max. Unit
V
DD
Core Supply Voltage –0.5 4.6 V
V
DDA
Analog Supply Voltage –0.5 4.6 V
V
IN
Input Voltage Relative to V
SS
–0.5 V
DD
+ 0.5 VDC
T
S
Temperature, Storage Non-functional –65 +150 °C
T
A
Temperature, Operating Ambient Functional 0 70 °C
T
J
Temperature, Junction Functional 150 °C
ESD
HBM
ESD Protection (Human Body Model) MIL-STD-883, Method 3015 2000 V
Ø
JC
Dissipation, Junction to Case Mil-Spec 883E Method 1012.1 15 °C/W
Ø
JA
Dissipation, Junction to Ambient JEDEC (JESD 51) 45 °C/W
UL–94 Flammability Rating At 1/8 in. V – 0
MSL Moisture Sensitivity Level 1
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing
is NOT required.
DC Electrical Specifications
Parameter Description Conditions Min. Max. Unit
V
DD
, V
DDA
3.3 Operating Voltage 3.3V ± 5% 3.135 3.465 V
V
ILI2C
Input Low Voltage SDATA, SCLK 1.0
V
IHI2C
Input High Voltage SDATA, SCLK 2.2
V
IL
Input Low Voltage V
SS
– 0.5 0.8 V
V
IH
Input High Voltage 2.0 V
DD
+ 0.5 V
I
IL
Input Leakage Current Except Pull-ups or Pull-downs
0 < V
IN
< V
DD
–5 5 µA
V
OL
Output Low Voltage I
OL
= 1 mA 0.4 V
V
OH
Output High Voltage I
OH
= –1 mA 2.4 V
I
OZ
High-impedance Output Current –10 10 µA
C
IN
Input Pin Capacitance 2 5 pF
C
OUT
Output Pin Capacitance 3 6 pF
L
IN
Pin Inductance 7 nH
V
XIH
Xin High Voltage 0.7V
DD
V
DD
V
V
XIL
Xin Low Voltage 0 0.3V
DD
V
I
DD
Dynamic Supply Current At 200 MHz and all outputs
loaded per Table 9 and Figure 7
280 mA
I
PD
Power-down Supply Current PD# Asserted 1 mA
[+] Feedback
CY28405
Document #: 38-07512 Rev. *B Page 15 of 19
AC Electrical Specifications
Parameter Description Conditions Min. Max. Unit
Crystal
T
DC
XIN Duty Cycle The device will operate
reliably with input duty cycles
up to 30/70 but the REF clock
duty cycle will not be within
specification
47.5 52.5 %
T
PERIOD
XIN period When Xin is driven from an
external clock source
69.841 71.0 ns
T
R
/ T
F
XIN Rise and Fall Times Measured between 0.3V
DD
and 0.7V
DD
–10.0ns
T
CCJ
XIN Cycle to Cycle Jitter As an average over 1 µs
duration
–500ps
L
ACC
Long-term Accuracy Over 150ms 300 ppm
CPU at 0.7V
T
DC
CPUT and CPUC Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
100-MHz CPUT and CPUC Period Measured at crossing point V
OX
9.9970 10.003 ns
T
PERIOD
133-MHz CPUT and CPUC Period Measured at crossing point V
OX
7.4978 7.5023 ns
T
PERIOD
200-MHz CPUT and CPUC Period Measured at crossing point V
OX
4.9985 5.0015 ns
T
SKEW
Any CPU to CPU Clock Skew Measured at crossing point V
OX
–100ps
T
CCJ
CPU Cycle to Cycle Jitter Measured at crossing point V
OX
–125ps
T
R
/ T
F
CPUT and CPUC Rise and Fall Times Measured from V
OL
= 0.175
to V
OH
= 0.525V
175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of
2*(T
R
– T
F
)/ (T
R
+ T
F
)
–20%
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math average, see Figure 7 660 850 mv
V
LOW
Voltage Low Math average,see Figure 7 –150 mv
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mv
V
OVS
Maximum Overshoot Voltage V
HIGH
+0.3 V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 7. Measure SE 0.2 V
3V66
T
DC
3V66 Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled 3V66 Period Measurement at 1.5V 14.9955 15.0045 ns
T
PERIOD
Spread Enabled 3V66 Period Measurement at 1.5V 14.9955 15.0799 ns
T
HIGH
3V66 High Time Measurement at 2.4V 4.9500 ns
T
LOW
3V66 Low Time Measurement at 0.4V 4.5500 ns
T
R
/ T
F
3V66 Rise and Fall Times Measured between 0.4V and
2.4V
0.5 2.0 ns
T
SKEW
Any 3V66 to Any 3V66 Clock Skew Measurement at 1.5V 250 ps
T
CCJ
3V66 Cycle to Cycle Jitter Measurement at 1.5V 250 ps
PCI/PCIF
T
DC
PCIF and PCI Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.0009 ns
T
PERIOD
Spread Enabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.1598 ns
T
HIGH
PCIF and PCI High Time Measurement at 2.4V 12.0 ns
[+] Feedback

CY28405OXC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC CLOCK SYNTHESIZER 48SSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet