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AT91M55800A
1745CS–ATARM–05/02
Product Overview
Power Supplies The AT91M55800A has 5 kinds of power supply pins:
• VDDCORE pins, which power the chip core
• VDDIO pins, which power the I/O Lines
• VDDPLLpins,whichpowertheoscillatorandPLLcells
• VDDA pins, which power the analog peripherals ADC and DAC
• VDDBU pins, which power the RTC, the 32768 Hz oscillator and the Shut-down
Logic of the APMC
VDDIO and VDDCORE are separated to permit the I/O lines to be powered with 5V,
thus resulting in full TTL compliance.
The following ground pins are provided:
• GND for both VDDCORE and VDDIO
• GNDPLL for VDDPLL
•GNDAforVDDA
• GNDBU for VDDBU
All of these ground pins must be connected to the same voltage (generally the board
electric ground) with wires as short as possible. GNDPLL, GNDA and GNDBU are pro-
vided separately in order to allow the user to add a decoupling capacitor directly
between the power and ground pads. In the same way, the PLL filter resistor and capac-
itors must be connected to the device and to GNDBU with wires as short as possible.
Also, the external load capacitances of the main oscillator crystal and the 32768 Hz
crystal must be connected respectively to GNDPLL and to GNDBU with wires as short
as possible.
The main constraints applying to the different voltages of the device are:
• VDDBU must be lower than or equal to VDDCORE
• VDDA must be higher than or equal to VDDCORE
• VDDCORE must be lower than or equal to VDDIO
The nominal power combinations supported by the AT91M55800A are described in the
following table:
Input/Output
Considerations
After the reset, the peripheral I/Os are initialized as inputs to provide the user with maxi-
mum flexibility. It is recommended that in any application phase, the inputs to the
AT91M55800A microcontroller be held at valid logic levels to minimize the power
consumption.
Table 5. Nominal Power Combinations
VDDIO
VDDCOR
E VDDA VDDPLL VDDBU
Maximum Operating
Frequency
3V 3V 3V 3V 3V 33 MHz
3.3V 3.3V 3.3V 3.3V 3.3V 33 MHz
5V 3.3V 3.3V 3.3V 3.3V 33 MHz
