Expand menu
Hello, Sign in
My Account
0
Cart
Home
Products
Sensors
Semiconductors
Passive Components
Connectors
Power
Electromechanical
Optoelectronics
Circuit Protection
Integrated Circuits - ICs
Main Products
Manufacturers
Blog
Services
About OMO
About Us
Contact Us
Check Stock
CY14V256LA-BA35XIT
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P22
CY14V256LA
Document Number: 001-76295 Rev
. *D
Page 13 of 22
AutoStore/Power-up RECALL
Over the
Oper
ating Range
Parameter
Description
CY14V256LA
Unit
Min
Max
t
HRECALL
[21]
Power-up RECALL durati
on
–
20
ms
t
STORE
[22]
STORE cycle duration
–
8
ms
t
DELA
Y
[23]
T
ime all
owed to complete SRAM write cycle
–
25
ns
V
SWITCH
Low voltage trigger level for V
CC
–2
.
9
0
V
V
IODIS
[24]
I/O disable voltage on V
CCQ
–1
.
5
0
V
t
VCCRISE
[25]
V
CC
rise time
150
–
µs
V
HDIS
[25]
HSB
output disable voltage on V
CC
–1
.
9
V
t
LZHSB
[25]
HSB
to output
active time
–
5
µs
t
HHHD
[25]
HSB
high active time
–
500
ns
Notes
21.
t
HRECALL
starts from the time V
CC
rises above V
SWITCH
.
22.
If an SRAM write has not
taken pl
ace since the last no
nvolatile cycle, no
AutoS
tore or Hardware ST
ORE takes pl
ace.
23.
On a Hardware STORE and AutoS
tore initiation, SRAM write operat
ion continues to be enabled for time t
DELA
Y
.
24.
HSB
is not defined below V
IODIS
voltage.
25.
These parameters are guaranteed by design and are not
tested.
CY14V256LA
Document Number: 001-76295 Rev
. *D
Page 14 of 22
Switching W
aveforms
Figure 8. AutoStore or Power-up
RECALL
[26]
V
IODIS
t
VCC
R
I
S
E
t
STORE
t
STORE
t
HHHD
t
HHHD
t
DELAY
t
DELAY
t
LZ
HS
B
t
LZ
HS
B
t
HRECALL
t
HRECALL
HSB OUT
Auto
Store
POWE
R-
UP
RE
CA
LL
Read & Write
Inhi
bit
ed
(
RWI
)
POWE
R-UP
RECALL
Read & Write
BROWN
OUT
Auto
Store
POWER-UP
RECALL
Read
&
Write
POWE
R
DOWN
Au
t
oSt
ore
Note
Note
Note
V
SWITCH
V
HDIS
Read
&
Write
BROWN
OUT
I/O Disable
V
CC
V
CC
V
CCQ
V
CCQ
V
CCQ
Note
22
22
27
27
Notes
26.
Read and write cycles are ignored during STORE, RECALL, and while V
CC
is below V
SWITCH
.
27.
During power-up and power-down, HSB
glitches when HSB
pin is pulled up through an externa
l resistor
.
CY14V256LA
Document Number: 001-76295 Rev
. *D
Page 15 of 22
Sof
tware Controlled STORE/RECALL Cycle
Over the
Oper
ating Range
Parameter
[28, 29]
Description
35 ns
Unit
Min
Max
t
RC
STORE/RECALL initiation cycle time
35
–
ns
t
SA
Address setup time
0
–
ns
t
CW
Clock pulse width
20
–
ns
t
HA
Address hold time
0
–
ns
t
RECALL
RECALL duration
–
200
µs
Switching W
aveforms
Figure 9. CE
and OE
Controlled Software STORE/RECALL Cycle
[29]
Figure 10. AutoStore Enable / Disable Cycle
[29]
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZC
E
t
HZ
CE
t
HA
t
HA
t
HA
t
ST
OR
E
/t
RECALL
t
HHHD
t
LZH
SB
Hi
gh
Impe
dance
Ad
dress #1
Ad
dress #6
Add
ress
CE
OE
HSB (STORE
only)
DQ (DATA)
RWI
t
DELAY
Note
30
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZC
E
t
HZCE
t
HA
t
HA
t
HA
t
DELAY
Addr
ess #
1
Ad
dress #6
Addres
s
CE
OE
DQ (DAT
A)
t
SS
Note
RWI
30
Notes
28.
The software sequence
is clocked with CE
controlled or OE
controlled reads.
29.
The six consecutive addresses must be read in the order listed in
T
able 1 on page 5
. WE
must be HIGH during all six c
onsecutive cycles.
30.
DQ output data at the sixth read may be invalid since the output is disabled at t
DELA
Y
time.
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P22
CY14V256LA-BA35XIT
Mfr. #:
Buy CY14V256LA-BA35XIT
Manufacturer:
Cypress Semiconductor
Description:
NVRAM 256Kb 35ns 32K x 8 nvSRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
Paypal
Visa
MoneyGram
Western
Union
Products related to this Datasheet
CY14V256LA-BA35XI
CY14V256LA-BA35XIT
