LTC6268/LTC6269
10
62689f
For more information www.linear.com/LTC6268
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
Supply Current vs Shutdown
Voltage
Supply Current vs Shutdown
Voltage
T
A
= 25°C, unless otherwise noted.
SUPPLY VOLTAGE (V)
3.0
0
SUPPLY CURRENT (mA)
30
15
18
21
24
27
12
9
6
3
3.5 5.0 5.54.0 4.5
6268 G28
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
V
S
= 0V
V
CM
= 1V
A
V
= 1
SHUT DOWN VOLTAGE (V)
0.0
0
SUPPLY CURRENT (mA)
25
15
20
10
5
1.5 2.00.5 1.0
6268 G29
V
S
= 0V, 5V
V
CM
= 2.75V
A
V
= 1
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
SHUT DOWN VOLTAGE (V)
0.0
0
SUPPLY CURRENT (mA)
25
15
20
10
5
1.5 2.00.5 1.0
6268 G30
V
S
= 0V, 3.1V
V
CM
= 1V
A
V
= 1
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
Large Signal Response
TIME (nS)
0
–2.5
–3.0
V
OUT
(V)
2.0
1.5
1.0
0.5
0.0
–0.5
–1.0
–2.0
–1.5
3.0
2.5
20 80 10040 60
6268 G27
V
S
= ±2.5V, A
V
= 1, R
LOAD
= 1k
C
LOAD
= 0pF C
LOAD
= 10pF
LTC6268/LTC6269
11
62689f
For more information www.linear.com/LTC6268
PIN FUNCTIONS
–IN: Inverting Input of the Amplifier. The voltage range of
this pin is from V
to V
+
–0.5V.
+IN: Non-Inverting Input. The voltage range of this pin is
from V
to V
+
–0.5V.
V
+
: Positive Power Supply. Total supply (V
+
V
) voltage
is from 3.1V to 5.25V. Split supplies are possible as long
as the total voltage between V
+
and V
is between 3.1V and
5.25. A bypass capacitor of 0.1µF should be used between
V
+
to ground as close to the pin as possible.
V
: Negative Power Supply. Normally tied to ground, it
can also be tied to a voltage other than ground as long
as the voltage difference between V
+
and V
is between
3.1V and 5.25V. If it is not connected to ground, bypass
it to ground with a capacitor of 0.1µF as close to the pin
as possible.
SHDN, SDA, SDB: Active Low op amp shutdown, threshold
is 0.75V above the negative supply, V
. If left unconnected,
the amplifier is enabled.
OUT: Amplifier Output.
NC: Not connected. May be used to create a guard ring
around the input to guard against
board leakage
currents.
See Applications Information section for more details.
V
V
+
D7
D6
Q7
Q5 Q6
Q3 Q4
BUFFER
I0
C0
Q1
D4
Q2
D5
OUT
Q9
Q8
–IN
+IN
SD
ESD_D2
ESD_D0
ESD_D1
ESD_D3
INPUT REPLICA
INPUT REPLICA
CMOS INPUT
BUFFER
REFERENCE
GENERATION
COMPLEMENTARY
INPUT STAGE
CASCODE STAGE
6268 BD
SIMPLIFIED SCHEMATIC
LTC6268 Simplified Schematic Diagram
LTC6268/LTC6269
12
62689f
For more information www.linear.com/LTC6268
OPERATION
The LTC6268 input signal range is specified from the
negative supply to 0.5V below the positive power supply,
while the output can swing from rail-to-rail. The schematic
above depicts a simplified schematic of the amplifier.
The input pins drive a CMOS buffer stage. The CMOS buffer
stage creates replicas of the input voltages to boot strap
the protection diodes. In turn, the buffer stage drives a
complementary input stage consisting of two differential
amplifiers, active over different ranges of input common
mode voltage. The main differential amplifier is active with
input common mode voltages from the negative power
supply to approximately 1.55V below the positive supply,
with the second amplifier active over the remaining range
to 0.5V below the positive supply rail. The buffer and
output bias stage uses a special compensation technique
ensuring stability of the op amp. The common emitter
topology of output transistors Q1/Q2 enables the output
to swing from rail-to-rail.
APPLICATIONS INFORMATION
Figure 1. Simplified TIA Schematic
For a trans-impedance amplifier (TIA) application such as
shown in Figure 1, all three of these op amp parameters,
plus the value of feedback resistance R
F
, contribute to noise
behavior in different ways, and external components and
traces will add to C
IN
. It is important to understand the
impact of each parameter independently. Input referred
voltage noise (e
N
) consists of flicker noise (or 1/f noise),
which dominates at lower frequencies, and thermal noise
which dominates at higher frequencies. For LTC6268, the
1/f corner, or transition between 1/f and thermal noise,
is at 80kHz. The i
N
and R
F
contributions to input referred
noise current at the minus input are relatively straight
forward, while the e
N
contribution is amplified by the noise
gain. Because there is no gain resistor, the noise gain is
calculated using feedback resistor(R
F
) in conjunction
with impedance of C
IN
as (1 + 2π R
F
• C
IN
• Freq), which
increases with frequency. All of the contributions will be
limited by the closed loop bandwidth. The equivalent input
current noise is shown in Figures 2-5, where e
N
represents
contribution from input referred voltage noise (e
N
), i
N
represents contribution from input referred current noise
(
i
N
), and R
F
represents contribution from feedback resistor
(R
F
). TIA gain (R
F
) and capacitance at input (C
IN
) are also
shown on each figure. Comparing Figures 2 & 3, and 4 &
5 for higher frequencies, e
N
dominates when C
IN
is high
(5pF) due to the amplification mentioned above while i
N
dominates when C
IN
is low (1pF). At lower frequencies, the
+
C
F
R
F
C
IN
GND
IN
OUT
6268 F01
Noise
To minimize the LTC6268’s noise over a broad range of
applications, careful consideration has been placed on
input referred voltage noise (e
N
), input referred current
noise (i
N
) and input capacitance C
IN
.

LTC6269IDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Operational Amplifiers - Op Amps 2x 500MHz Ultra-L Bias C FET In Op Amp
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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