LTC6268/LTC6269
18
62689f
For more information www.linear.com/LTC6268
APPLICATIONS INFORMATION
The material used in the construction of the PCB can
sometimes influence the leakage characteristics of the
design. Exotic materials such as Teflon can be used to
improve leakage performance in specific cases but they
are generally not necessary if some basic rules are applied
in the design of conventional FR4 PCBs. It is important to
keep the high impedance signal path as short as possible
on the board. A node with high impedance is susceptible
to picking up any stray signals in the system so keeping it
as short as possible reduces this effect. In some cases, it
may be necessary to have a metallic shield over this por
-
tion of
the circuit. However, metallic shielding increases
capacitance.
Another technique for avoiding leakage paths
is to cut slots in the PCB. High impedance circuits are also
susceptible to electrostatic as well as electromagnetic ef
-
fects. The static charge carried by a person walking by the
cir
cuit can induce an interference on the order of 100’s of
femtoamps. A metallic shield can reduce this effect as well.
The layout of a high impedance input node is very important.
Other signals should be routed well away from this signal
path
and there should be no internal power planes under
it. The best defense from coupling signals is distance and
this includes vertically as well as on the surface. In cases
where the space is limited, slotting the board around the
high impedance input nodes can provide additional isola
-
tion and reduce the effect of contamination. In electrically
noisy environments the use of driven guard rings around
these nodes can be effective (see Figure 12). Adding any
additional components such as filters to the high imped
-
ance input node can increase leakage. The leakage current
of
a ceramic capacitor is orders of magnitude larger than
the bias current of this device. Any filtering will need to
be done after this first stage in the signal chain.
Low Input Offset Voltage
The LTC6268 has a maximum offset voltage of ±2.5mV
(PNP region) over temperature. The low offset voltage is
essential for precision applications. There are 2 different
input stages that are used depending on the input common
mode voltage. To increase the versatility of the LTC6268, the
offset voltages are trimmed for both regions of operation.
Rail-to-Rail Output
The LTC6268 has a rail-to-rail output stage that has ex
-
cellent output drive capability. It is capable of delivering
over ±40mA of output drive current over temperature.
Furthermore, the output can reach within 200mV of either
rail while driving ±10mA. Attention must be paid to keep
the junction temperature of the IC below 150°C.
Input Protection
To prevent breakdown of internal devices in the input stage,
the two op amp inputs should NOT be separated by more
than 2.0V. To help protect the input stage, internal circuitry
will engage automatically if the inputs are separated by
>2.0V and input currents will begin to flow. In all cases,
care should be taken so that these currents remain less
than 1mA. Additionally, if only one input is driven, inter
-
nal cir
cuitry will prevent any breakdown condition under
transient
conditions. The worst-case differential input
voltage usually occurs when the +input is driven and the
output is accidentally shorted to ground while in a unity
gain configuration.
