Data Sheet ADuM1100
Rev. K | Page 15 of 20
1.7
3.0
1.3
1.2
1.1
3.5
4.0 4.5 5.0 5.5
1.4
1.6
1.5
–40°C
+25°C
+125°C
INPUT SUPPLY VOLTAGE, V
DD1
(V)
INPUT THRESHOLD, V
ITH
(V)
02462-011
Figure 11. Typical Input Voltage Switching Threshold,
Low-to-High Transition
INPUT SUPPLY VOLTAGE, V
DD1
(V)
1.4
3.0
INPUT THRESHOLD, V
ITH
(V)
1.0
0.9
0.8
3.5 4.0 4.5 5.0 5.5
1.1
1.3
1.2
–40°C
+25°C
+125°C
02462-012
Figure 12. Typical Input Voltage Switching Threshold,
High-to-Low Transition
ADuM1100 Data Sheet
Rev. K | Page 16 of 20
APPLICATION INFORMATION
PC BOARD LAYOUT
The ADuM1100 digital isolator requires no external interface
circuitry for the logic interfaces. A bypass capacitor is recom-
mended at the input and output supply pins. The input bypass
capacitor can conveniently be connected between Pin 3 and
Pin 4 (see Figure 13). Alternatively, the bypass capacitor can be
located between Pin 1 and Pin 4. The output bypass capacitor
can be connected between Pin 7 and Pin 8 or Pin 5 and Pin 8.
The capacitor value should be between 0.01 μF and 0.1 μF. The
total lead length between both ends of the capacitor and the
power supply pins should not exceed 20 mm.
V
DD1
V
I
(DATA IN)
GND
1
V
DD2
V
O
(DATA OUT)
GND
2
(OPTIONAL)
02462-013
Figure 13. Recommended Printed Circuit Board Layout
See the AN-1109 Application Note for board layout guidelines.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay time describes the length of time it takes for
a logic signal to propagate through a component. Propagation
delay time to logic low output and propagation delay time to
logic high output refer to the duration between an input
signal transition and the respective output signal transition
(see Figure 14).
INPUT (V
I
)
OUTPUT (V
O
)
t
PLH
t
PHL
50%
50%
02462-014
Figure 14. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
t
PLH
and t
PHL
and provides an indication of how accurately the
input signal’s timing is preserved in the component’s output
signal. Propagation delay skew is the difference between the
minimum and maximum propagation delay values among
multiple ADuM1100 components operated at the same
operating temperature and having the same output load.
Depending on the input signal rise/fall time, the measured
propagation delay based on the input 50% level can vary from
the true propagation delay of the component (as measured from
its input switching threshold). This is because the input threshold,
as is the case with commonly used optocouplers, is at a different
voltage level than the 50% point of typical input signals. This
propagation delay difference is given by
Δ
LH
= t
PLH
t
PLH
= (t
R
/0.8 V
I
)(0.5 V
I
V
ITH (L-H)
)
Δ
HL
= t
PHL
t
PHL
= (t
F
/0.8 V
I
)(0.5 V
I
V
ITH (H-L)
)
where:
t
PLH
and t
PHL
are the propagation delays as measured from the
input 50% level.
t’
PLH
and t’
PHL
are the propagation delays as measured from the
input switching thresholds.
t
R
and t
F
are the input 10% to 90% rise/fall times.
V
I
is the amplitude of the input signal (0 V to V
I
levels assumed).
V
ITH (L–H)
and V
ITH (H–L)
are the input switching thresholds.
LH
V
ITH(H–L)
INPUT (V
I
)
V
ITH(L–H)
V
I
HL
t
PHL
t'
PHL
t
PLH
t'
PLH
OUTPUT (V
O
)
50%
50%
02462-015
Figure 15. Impact of Input Rise/Fall Time on Propagation Delay
Data Sheet ADuM1100
Rev. K | Page 17 of 20
INPUT RISE TIME (10%–90%, ns)
4
1
PROPAGATION DELAY CHANGE, Δ
LH
(ns)
2
0
3
4 8
9
10
3
1
5V INPUT SIGNAL
2
5
6 7
3.3V INPUT SIGNAL
02462-016
Figure 16. Typical Propagation Delay Change Due to
Input Rise Time Variation (for V
DD1
= 3.3 V and 5 V)
INPUT RISE TIME (10%–90%, ns)
0
1
PROPAGATION DELAY CHANGE, Δ
HL
(ns)
–2
–4
3 4 8
9
10
–1
–3
2 5 6 7
02462-017
5V INPUT SIGNAL
3.3V INPUT SIGNAL
Figure 17. Typical Propagation Delay Change Due to
Input Fall Time Variation (for V
DD1
= 3.3 V and 5 V)
The impact of the slower input edge rates can also affect the
measured pulse width distortion as based on the input 50%
level. This impact can either increase or decrease the apparent
pulse width distortion depending on the relative magnitudes of
t
PHL
, t
PLH
, and PWD. The case of interest here is the condition
that leads to the largest increase in pulse width distortion. The
change in this case is given by
PWD
= PWD PWD = ∆
LH
− ∆
HL
=
(t/0.8 V
I
)(V V
ITH (L-H)
V
ITH (H-L)
), (for t = t
R
= t
F
)
where:
PWD = |t
PLH
t
PHL
|.
PWD’ = |t’
PLH
t’
PHL
|.
This adjustment in pulse width distortion is plotted as a
function of input rise/fall time in Figure 18.
INPUT RISE/FALL TIME (10%–90%, ns)
6
1
PULSE WIDTH DISTORTION ADJUSTMENT,
Δ
PWD
(ns)
0
3 4 8
9
102 5 6 7
5
4
3
2
1
02462-018
3.3V INPUT SIGNAL
5V INPUT SIGNAL
Figure 18. Typical Pulse Width Distortion Adjustment Due to
Input Rise/Fall Time Variation (for V
DD1
= 3.3 V and 5 V)
METHOD OF OPERATION, DC CORRECTNESS, AND
MAGNETIC FIELD IMMUNITY
The two coils in Figure 1 act as a pulse transformer. Positive
and negative logic transitions at the isolator input cause narrow
(2 ns) pulses to be sent via the transformer to the decoder. The
decoder is bistable and therefore either set or reset by the pulses
indicating input logic transitions. In the absence of logic transi-
tions at the input for more than ~1 μs, a periodic update pulse
of the appropriate polarity is sent to ensure dc correctness at the
output. If the decoder receives none of these update pulses for
more than about 5 μs, the input side is assumed to be unpowered
or nonfunctional, in which case the isolator output is forced to
a logic high state by the watchdog timer circuit.
The limitation on the magnetic field immunity of the
ADuM1100 is set by the condition in which induced voltage in
the transformer’s receiving coil is sufficiently large to either
falsely set or reset the decoder. The analysis that follows defines
the conditions under which this can occur. The 3.3 V operating
condition of the ADuM1100 is examined because it represents
the most susceptible mode of operation.
The pulses at the transformer output are greater than 1.0 V in
amplitude. The decoder has sensing thresholds at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil
is given by
V = (−/dt) ∑π r
n
2
, n = 1, 2, . . . , N
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
n
is the radius of the nth turn in the receiving coil (cm).

ADUM1100UR-RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital Isolators Digital SGL CH
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