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ADUM1100UR-RL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
Data Sheet ADuM1100
Rev. K | Page 3 of 20
REVISION HISTORY
7/15—Rev. J to Rev. K
Changes to Table 5 and Table 6 ............................................................. 10
4/15—Rev. I to Rev. J
Changes to Logic Low Output Voltage Parameter, Test
Conditions, Table 2 ..................................................................................... 6
3/12—Rev. H to Rev. I
Created Hyperlink for Safety and Regulatory Approvals
Entry in Features Section ................................................................. 1
Change to PC Board Layout Section ............................................ 16
3/11—Rev. G to Rev. H
Changes to Data Sheet Title ............................................................. 1
Changes to Ordering Guide ........................................................... 18
6/07—Rev. F to Rev. G
Updated VDE Certification Throughout ....................................... 1
Changes to Features and Endnote 1 ................................................ 1
Changes to Table 5 and Table 6 ....................................................... 9
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
3/06—Rev. E to Rev. F
Updated Format.................................................................. Universal
Added Note 1 ..................................................................................... 1
Changes to Table 1 ............................................................................ 4
Changes to Table 2 ............................................................................ 6
Changes to Table 3 ............................................................................ 8
Added Table 11 ................................................................................ 13
Inserted Power Consumption Section.......................................... 18
10/03—Rev. D to Rev. E
Changes to Product Name, Features, and General Description . 1
Changes to Regulatory Information ............................................... 6
Changes to DIN EN 60747-5-2 (VDE 0884 Part 2) Insulation
Characteristics ................................................................................... 6
Changes to Absolute Maximum Ratings ........................................ 7
Changes to Recommended Operating Conditions ....................... 7
Changes to Ordering Guide ............................................................. 8
6/03—Rev. C to Rev. D
Changed DIN EN 60747-5-2 (VDE 0884 Part 2) Insulation
Characteristics ................................................................................... 6
Updated Ordering Guide ................................................................. 8
Updated Outline Dimensions ........................................................ 13
4/03—Rev. B to Rev. C
Changes to Features and Patent Note ............................................. 1
Changes to Regulatory Information ............................................... 6
Changes to Insulation Characteristics Section .............................. 6
Changes to Absolute Maximum Ratings........................................ 7
Changes to Package Branding ......................................................... 8
Changes to Method of Operation, DC Correctness, and
Magnetic Field Immunity Section ................................................ 11
Replaced Figure 9 ............................................................................ 12
1/03—Rev. A to Rev. B
Added ADuM1100UR Grade ........................................... Universal
Changed ADuM1100AR/ADuM1100BR to
ADuM1100 ......................................................................... Universal
Changes to Features and General Description .............................. 1
Changes to Specifications................................................................. 2
Added Electrical Specifications, Mixed 5 V/3 V or 3 V/5 V
Operation Table ................................................................................. 4
Updated Regulatory Information ................................................... 6
Changes to VDE 0884 Insulation Characteristics ........................ 6
Changes to Absolute Maximum Ratings........................................ 7
Changes to Package Branding ......................................................... 8
Updated TPC 3 to TPC 8 ................................................................. 9
Deleted iCoupler in Field Bus Networks Section ....................... 11
Changes to Figure 8 ........................................................................ 12
Added Figure 9 and Related Text .................................................. 12
11/02—Rev. 0 to Rev. A
Edits to Features ................................................................................ 1
Edits to Regulatory Information ..................................................... 4
Edits to VDE 0884 Insulation Characteristics ............................... 5
Added Revision History ................................................................. 12
Updated Outline Dimensions........................................................ 12
ADuM1100 Data Sheet
Rev. K | Page 4 of 20
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V. All minimum/maximum specifications
apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Input Supply Current
I
DD1 (Q)
0.3
0.8
mA
V
I
= 0 V or V
DD1
Output Supply Current I
DD2 (Q)
0.01 0.06 mA V
I
= 0 V or V
DD1
Input Supply Current (25 Mbps)
(See Figure 5)
I
DD1 (25)
2.2 3.5 mA 12.5 MHz logic signal frequency
Output Supply Current
1
(25 Mbps)
(See Figure 6)
I
DD2 (25)
0.5 1.0 mA 12.5 MHz logic signal frequency
Input Supply Current (100 Mbps)
(See Figure 5)
I
DD1 (100)
9.0 14 mA 50 MHz logic signal frequency,
ADuM1100BR/ADuM1100UR only
Output Supply Current
1
(100 Mbps)
(See Figure 6)
I
DD2 (100)
2.0 2.8 mA 50 MHz logic signal frequency,
ADuM1100BR/ADuM1100UR only
Input Current I
I
−10 +0.01 +10 µA 0 V ≤ V
IN
≤ V
DD1
Logic High Output Voltage
V
OH
DD2
5.0
V
I
O
= −20 μA, V
I
= V
IH
V
DD2
− 0.8 4.6 V I
O
= −4 mA, V
I
= V
IH
Logic Low Output Voltage V
OL
0.0 0.1 V I
O
= 20 μA, V
I
= V
IL
0.03 0.1 V I
O
= 400 μA, V
I
= V
IL
0.3 0.8 V I
O
= 4 mA, V
I
= V
IL
SWITCHING SPECIFICATIONS
For ADuM1100AR
Minimum Pulse Width
2
PW 40 ns C
L
= 15 pF, CMOS signal levels
Maximum Data Rate
3
25 Mbps C
L
= 15 pF, CMOS signal levels
For ADuM1100BR/ADuM1100UR
Minimum Pulse Width
2
PW 6.7 10 ns C
L
= 15 pF, CMOS signal levels
Maximum Data Rate
3
100 150 Mbps C
L
= 15 pF, CMOS signal levels
For All Grades
Propagation Delay Time to Logic Low
Output
4, 5
(See Figure 7)
t
PHL
10.5 18 ns C
L
= 15 pF, CMOS signal levels
Propagation Delay Time to Logic High
Output
4, 5
(See Figure 7)
t
PLH
10.5 18 ns C
L
= 15 pF, CMOS signal levels
Pulse Width Distortion |t
PLH
− t
PHL
|
5
PWD 0.5 2 ns C
L
= 15 pF, CMOS signal levels
Change vs. Temperature
6
3 ps/°C C
L
= 15 pF, CMOS signal levels
Propagation Delay Skew
(Equal Temperature)
5, 7
t
PSK1
8 ns C
L
= 15 pF, CMOS signal levels
Propagation Delay Skew
(Equal Temperature, Supplies)
5, 7
t
PSK2
6 ns C
L
= 15 pF, CMOS signal levels
Output Rise/Fall Time t
R
, t
F
3 ns C
L
= 15 pF, CMOS signal levels
Common-Mode Transient Immunity
at Logic Low/High Output
8
|CM
L
|,
|CM
H
|
25 35 kV/µs V
I
= 0 V or V
DD1
, V
CM
= 1000 V,
transient magnitude = 800 V
Refresh Rate f
r
1.2 Mbps
Input Dynamic Supply Current
9
I
DDI (D)
0.09 mA/Mbps
Output Dynamic Supply Current
9
I
DDO (D)
0.02 mA/Mbps
Data Sheet ADuM1100
Rev. K | Page 5 of 20
1
Output supply current values are with no output load present. See Figure 5 and Figure 6 for information on supply current variation with logic signal frequency. See
the Power Consumption section for guidance on calculating the input and output supply currents for a given data rate and output load.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
t
PHL
is measured from the 50% level of the falling edge of the V
I
signal to the 50% level of the falling edge of the V
O
signal. t
PLH
is measured from the 50% level of the
rising edge of the V
I
signal to the 50% level of the rising edge of the V
O
signal.
5
Because the input thresholds of the ADuM1100 are at voltages other than the 50% level of typical input signals, the measured propagation delay and pulse width
distortion can be affected by slow input rise/fall times. See the Propagation Delay-Related Parameters section and Figure 14 through Figure 18 for information on the
impact of given input rise/fall times on these parameters.
6
Pulse width distortion change vs. temperature is the absolute value of the change in pulse width distortion for a 1°C change in operating temperature.
7
t
PSK1
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature and output load within the
recommended operating conditions. t
PSK2
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating
temperature, supply voltages, and output load within the recommended operating conditions.
8
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate
that can be sustained while maintaining V
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling edges. The transient magnitude is the range
over which the common mode is slewed.
9
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 5 and Figure 6 for information on
supply current variation with logic signal frequency. See the Power Consumption section for guidance on calculating the input and output supply currents for a given
data rate and output load.
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ADUM1100UR-RL7

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