7
Package Characteristics
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Input-Output Momentary
Withstand Voltage**
V
ISO
3750 V
RMS
RH < 50%, t = 1 min.
T
A
= 25°C
8, 9
Resistance (Input-Output) R
I-O
10
12
Ω
V
I-O
= 500 V
DC
9
Capacitance (Input-Output) C
I-O
0.8 pF ƒ = 1 MHz
LED-to-Case Thermal
Resistance
q
LC
467 °C/W Thermocouple located at
center underside of package
28
LED-to-Detector Thermal
Resistance
q
LD
442 °C/W
Detector-to-Case Thermal
Resistance
q
DC
126 °C/W
* All typicals at T
A
= 25°C.
** The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage
rating. For the continuous voltage rating refers to your equipment level safety specication or Avago Application Note 1074 entitled “Optocoupler
Input-Output Endurance Voltage.”
Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 0.0727 mA/°C.
2. Maximum pulse width = 10 μs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak
minimum = 2.0 A. See Applications section for additional details on limiting I
OH
peak.
3. Derate linearly above 70°C free-air temperature at a rate of 5.0 mW/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 5.0 mW/°C. The maximum LED junction temperature should not exceed 150°C.
5. Maximum pulse width = 50 μs, maximum duty cycle = 0.5%.
6. In this test V
OH
is measured with a dc load current. When driving capacitive loads V
OH
will approach V
CC
as I
OH
approaches zero amps.
7. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
8. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 Vrms for 1 second (leakage detection
current limit, II-O ≤ 5 μA).
9. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
10. The dierence between t
PHL
and t
PLH
between any two ACPL-312U parts under the same test condition.
11. Pins 1 and 4 need to be connected to LED common.
12. Common mode transient immunity in the high state is the maximum tolerable dV
CM
/dt of the common mode pulse, V
CM
, to assure that the output
will remain in the high state (i.e., V
O
> 15.0 V).
13. Common mode transient immunity in a low state is the maximum tolerable dV
CM
/dt of the common mode pulse, V
CM
, to assure that the output
will remain in a low state (i.e., V
O
< 1.0 V).
14. This load condition approximates the gate load of a 1200 V/75A IGBT.
15. Pulse Width Distortion (PWD) is dened as |t
PHL
-t
PLH
| for any given device.