AD80066 Data Sheet
Rev. B | Page 10 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD80066
TOP VIEW
(Not to Scale)
AVDD AVSS
D6
D5
D4
D3
D2
D1
(LSB) D0
CDSCLK1
CDSCLK2
ADCCLK
DRVDD
DRVSS
(MSB) D7
VINA
OFFSET
VINB
CML
VINC
CAPT
CAPB
VIND
AVDD
SLOAD
SCLK
SDATA
AVSS
1
2
3
4
28
27
26
25
5
6
7
24
23
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
08552-013
Figure 13. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Type
1
Description
1 AVDD P 5 V Analog Supply.
2 CDSCLK1 DI CDS Reference Level Sampling Clock.
3 CDSCLK2 DI CDS Data Level Sampling Clock.
4 ADCCLK DI ADC Sampling Clock.
5 DRVDD P Digital Output Driver Supply (3 V or 5 V).
6 DRVSS P Digital Output Driver Ground.
7 D7 (MSB) DO Data Output MSB. ADC DB15 high byte; ADC DB7 low byte.
8 D6 DO Data Output. ADC DB14 high byte; ADC DB6 low byte.
9 D5 DO Data Output. ADC DB13 high byte; ADC DB5 low byte.
10 D4 DO Data Output. ADC DB12 high byte; ADC DB4 low byte.
11 D3 DO Data Output. ADC DB11 high byte; ADC DB3 low byte.
12 D2 DO Data Output. ADC DB10 high byte; ADC DB2 low byte.
13 D1 DO Data Output. ADC DB9 high byte; ADC DB1 low byte.
14 D0 (LSB) DO Data Output LSB. ADC DB8 high byte; ADC DB0 low byte.
15 SDATA DI/DO Serial Interface Data Input/Output.
16 SCLK DI Serial Interface Clock Input.
17 SLOAD DI Serial Interface Load Pulse.
18 AVDD P 5 V Analog Supply.
19 AVSS P Analog Ground.
20 VIND AI Analog Input, D Channel.
21 CAPB AO ADC Bottom Reference Voltage Decoupling.
22 CAPT AO ADC Top Reference Voltage Decoupling.
23 VINC AI Analog Input, C Channel.
24 CML AO Internal Bias Level Decoupling.
25 VINB AI Analog Input, B Channel.
26 OFFSET AO Clamp Bias Level Decoupling.
27 VINA AI Analog Input, A Channel.
28 AVSS P Analog Ground.
1
AI = analog input, AO = analog output, DI = digital input, DO = digital output, and P = power.
