ISL99227, ISL99227B
7
FN8684.2
October 27, 2016
Submit Document Feedback
Absolute Maximum Ratings Thermal Information
Supply Voltage (VCC, PVCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Input Supply Voltage (VIN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 25V
PHASE, SW Voltage (V
PH-GND,
V
SW-GND
). . . . . . . . . . . . . . . . . . -0.3V to 25V
GND - 10V (<20ns Pulse Width, 10µJ)
BOOT Voltage (V
BOOT-GND
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 36V
Other I/O Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
ESD Ratings
Human Body Model (Tested per JEDEC-JS-001-2014) . . . . . . . . . . .2.5kV
Charged Device Model (Tested per JS-002-2014) . . . . . . . . . . . . . . . 1kV
Machine Model (Tested per JESD22-A115C) . . . . . . . . . . . . . . . . . 250V
Latch-Up (Tested per JESD-78E; Class 2, Level A). . . . . . . . . . . . . . . 100mA
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
32 Ld 5x5 PQFN
Double Cooling Package (Notes 4
, 5, 7). . . . 10.7 4
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Operating Junction Temperature Range
IRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
HRZ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-10°C to +100°C
FRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Supply Voltage, V
CC
, PVCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±5%
Input Supply Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 18V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on an Intersil SPS evaluation board. Refer to Tech Brief TB379 for general thermal metric
info.
5. For
JC
, the “case temp” location is the center of the package underside.
Electrical Specifications Recommended operating conditions, unless otherwise noted. Boldface limits apply across the operating
temperature range, T
J
= -40°C to +125°C.
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 6
)TYP
MAX
(Note 6)UNIT
POWER RATING
Maximum Instant Power Dissipation T
A
= +25°C, 150A, (Note 7) 100 W
Maximum Continuous Power Dissipation T
A
= +25°C,
JA
= 10°C/W, T
J
= +150°C, (Note 7)12.5 W
THERMAL RESISTANCE
Thermal Resistance Junction to PCB
JB
Intersil SPS evaluation board, (Note 7)5.2°C/W
Thermal Resistance Junction to Ambient
JA
Intersil SPS evaluation board, (Note 7), 0 LFM 10.7 °C/W
Thermal Resistance Junction to Ambient
JA
Intersil SPS evaluation board, (Note 7), 400 LFM 9.3 °C/W
VCC SUPPLY CURRENT
Logic Standby Current IVCC PWM = Open 4.75 mA
Gate Drive Standby Current IPVCC PWM = Open 100 µA
Logic Operational Current IVCC PWM = 300kHz 4.75 mA
Gate Drive Operational Current IPVCC PWM = 300kHz 15 mA
POWER-ON RESET AND ENABLE
VCC Rising POR Threshold 3.86 4.20 V
VCC Falling POR Threshold 3.20 3.58 V
VCC POR Hysteresis 280 mV
VCC POR Delay to Operation 125 197 µs
VIN Rising POR Threshold 4.0 4.2 V
VIN Falling POR Threshold 3.4 3.5 V
VIN POR Hysteresis 445 mV
3.3V PWM INPUT FOR ISL99227 (See “TIMING DIAGRAM” Figure 5 on page 9
)
Sink Impedance 33.5 kΩ
Source Impedance 16.5 kΩ
ISL99227, ISL99227B
8
FN8684.2
October 27, 2016
Submit Document Feedback
Tri-State Lower Gate Falling Threshold V
CC
= 5V 1.11 V
Tri-State Lower Gate Rising Threshold V
CC
= 5V 0.87 V
Tri-State Upper Gate Rising Threshold V
CC
= 5V 2.13 V
Tri-State Upper Gate Falling Threshold V
CC
= 5V 1.95 V
Tri-State Shutdown Window V
CC
= 5V 1.3 1.8 V
5V PWM INPUT FOR ISL99227B (See “TIMING DIAGRAM” on Figure 5 on page 9
)
Sink Impedance 16.5 kΩ
Source Impedance 16.5 kΩ
Tri-State Lower Gate Falling Threshold V
CC
= 5V 1.51 V
Tri-State Lower Gate Rising Threshold V
CC
= 5V 1.14 V
Tri-State Upper Gate Rising Threshold V
CC
= 5V 3.24 V
Tri-State Upper Gate Falling Threshold V
CC
= 5V 3.02 V
Tri-State Shutdown Window V
CC
= 5V 1.6 2.8 V
SWITCHING TIME
GH Turn-On Propagation Delay t
PDHU
See Figure 5 (GL Low to GH High) 8 ns
GH Turn-Off Propagation Delay t
PDLU
See Figure 5 (PWM Low to GH Low) 40 ns
GL Turn-On Propagation Delay
t
PDHL
See Figure 5 (GH Low to GL High) 8 ns
GL Turn-Off Propagation Delay
t
PDLL
See Figure 5 (PWM High to GL Low) 23 ns
GL Exit Tri-State Propagation Delay
t
PDTSL
See Figure 5 (Tri-state to GL High) 25 ns
GH Exit Tri-State Propagation Delay
t
PDTSU
See Figure 5 (Tri-state to GH High) 35 ns
PWML to Tri-State Shutdown Hold-Off Time t
TSSHDL
See Figure 5 (PWM Low to GL Low) 40 ns
PWMH to Tri-State Shutdown Hold-Off Time t
TSSHDU
See Figure 5 (PWM High to GH Low) 50 ns
CURRENT MONITOR
REFIN Voltage Range 0.8 1.2 1.6 V
IMON Current Gain Accuracy
(Intersil SPS Validation Board, V
CC
= 5V)
10A, T
J
= +90°C ±2 %
10A, T
J
= +40°C to +125°C ±3 %
10A, T
J
= +20°C to +125°C ±4 %
Downslope Blanking Time 160 ns
HFET Overcurrent Trip V
CC
= 5V 90 A
IMON-REFIN at OCP 1.1 1.2 1.3 V
TEMPERATURE MONITOR
Over-Temperature Rising Threshold 140 °C
Over-Temperature Falling Threshold 125 °C
Over-Temperature Hysteresis 15 °C
Temperature Coefficient 8mV/K
TMON Voltage at +25°C Temperature V (T
J
) = 0.6V + (8mV*T
J
)0.80V
TMON High at Over-Temperature 2.3 2.5 2.7 V
FAULT PIN
Output Low Voltage 5mA 0.18 0.26 V
Leakage Current 16 nA
Electrical Specifications Recommended operating conditions, unless otherwise noted. Boldface limits apply across the operating
temperature range, T
J
= -40°C to +125°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 6
)TYP
MAX
(Note 6)UNIT
ISL99227, ISL99227B
9
FN8684.2
October 27, 2016
Submit Document Feedback
BOOTSTRAP DIODE
Forward Voltage Drop 5mA 0.09 V
ON-Resistance R
F
16 Ω
LGCTRL PIN
Rising Threshold Logic high; (normal: obeys PWM) 1.29 1.60 V
Falling Threshold Logic low; (forces GL low; LFET off) 0.70 1.01 V
MOSFETs
High-Side MOSFET (HFET) r
DS(ON)
3.84 mΩ
Low-Side MOSFET (LFET) r
DS(ON)
0.76 mΩ
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. These ratings vary with PCB layout and operating condition, and limited by SPS temperature and thermal shutdown trip point.
Electrical Specifications Recommended operating conditions, unless otherwise noted. Boldface limits apply across the operating
temperature range, T
J
= -40°C to +125°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 6
)TYP
MAX
(Note 6)UNIT
FIGURE 5. TIMING DIAGRAM (INTERNAL SIGNALS)
PWM
GH
GL
t
FL
t
PDHU
t
PDLL
t
RL
t
TSSHDL
t
PDTSL
t
PDTSU
t
FU
t
RU
t
PDLU
t
PDHL
t
TSSHDU
t
PDLFUR
t
PDUFLR

ISL99227FRZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Power Management Specialized - PMIC Smart Power Stage (SPS) Module with Integrated High-Accuracy
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union