83026BMI-01LFT Datasheet 83026BGI-01LFT, 83026BGI-01LF, 83026BMI-01LF | P1-P3

Low Skew, 1-to-2

Differential-to-LVCMOS/LVTTL Fanout Buffer

83026I-01

Data Sheet

GENERAL DESCRIPTION

The 83026I-01 is a low skew, 1-to-2 Differential-to-LVC-

MOS/LVTTL Fanout Buffer. The differential input can

accept most differential signal types (LVPECL, LVDS,

LVHSTL, HCSL and SSTL) and translate to two sin-

gle-ended LVCMOS/LVTTL outputs. The small 8-lead SOIC

footprint makes this device ideal for use in applications with

limited board space.

FEATURES

• Two LVCMOS / LVTTL outputs

• Differential CLK, nCLK input pair

• CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Maximum output frequency: 350MHz

• Output skew: 15ps (maximum)

• Part-to-part skew: 600ps (maximum)

• Additive phase jitter, RMS: 0.03ps (typical)

• Small 8 lead SOIC package saves board space

• 3.3V core, 3.3V, 2.5V or 1.8V output operating supply

• -40°C to 85°C ambient operating temperature

• Available in lead-free RoHS (6) package

BLOCK DIAGRAM PIN ASSIGNMENT

83026I-01

8-Lead SOIC

3.8mm x 4.8mm, x 1.47mm package body

M Package

Top View

VDD

CLK

nCLK

OE

1

2

3

4

Q0

Q1

CLK

nCLK

OE

VDDO

Q0

Q1

GND

8

7

6

5

83026I-01

8-Lead TSSOP

4.40mm x 3.0mm x 0.925mm

package body

G Package

Top View

VDD

CLK

nCLK

OE

1

2

3

4

VDDO

Q0

Q1

GND

8

7

6

5

83026I-01 Data Sheet

TABLE 1. PIN DESCRIPTIONS

TABLE 2. PIN CHARACTERISTICS

Number Name Type Description

1

V

DD

Power Positive supply pin.

2

CLK

Input Pulldown Non-inverting differential clock input.

3

nCLK

Input

Pullup/

Pulldown

Inverting differential clock input. V

DD

/2 default when left ﬂ oating.

4

OE

Input Pullup

Output enable. When HIGH, outputs are enabled. When LOW, outputs are in

High Impedance State. LVCMOS / LVTTL interface levels.

5

GND

Power Power supply ground.

6

Q1

Output Clock output. LVCMOS / LVTTL interface levels.

7

Q0

Output Clock output. LVCMOS / LVTTL interface levels.

8

V

DDO

Power Output supply pin.

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Input Outputs

OE Q0, Q1

0 HiZ

1 Active

TABLE 3. CONTROL FUNCTION TABLE

Symbol Parameter Test Conditions Minimum Typical Maximum Units

C

IN

Input Capacitance 4 pF

C

PD

Power Dissipation Capacitance

(per output)

V

DD

, V

DDO

= 3.465V 17 pF

V

DD

= 3.465V, V

DDO

= 2.625V 16 pF

V

DD

= 3.465V, V

DDO

= 1.95V 15 pF

R

PULLUP

Input Pullup Resistor 51

kΩ

R

PULLDOWN

Input Pulldown Resistor 51

kΩ

R

OUT

Output Impedance

V

DD

, V

DDO

= 3.3V 7

Ω

V

DD

= 3.3V, V

DDO

= 2.5V 8 Ω

V

DD

= 3.3V, V

DDO

= 1.8V 10 Ω

83026I-01 Data Sheet

TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, V

DD

= 3.3V ± 5%, V

DDO

= 1.71V TO 3.465V, TA = -40°C TO 85°C

Symbol Parameter Test Conditions Minimum Typical Maximum Units

V

DD

Positive Supply Voltage 3.135 3.3 3.465 V

V

DDO

Output Supply Voltage

3.135 3.3 3.465 V

2.375 2.5 2.625 V

1.71 1.8 1.89 V

I

DD

Power Supply Current 10 mA

I

DDO

Output Supply Current 3mA

TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, V

DD

= 3.3V ± 5%, V

DDO

= 2.375V TO 3.465V, TA = -40°C TO 85°C

Symbol Parameter Test Conditions Minimum Typical Maximum Units

V

IH

Input High Voltage OE 2 V

DD

+ 0.3 V

V

IL

Input Low Voltage OE -0.3 0.8 V

I

IH

Input High Current OE V

DD

= V

IN

= 3.465V 5 µA

I

IL

Input Low Current OE V

DD

= 3.465V, V

IN

= 0V -150 µA

V

OH

Output High Voltage; NOTE 1

V

DDO

= 3.135V 2.6 V

V

DDO

= 2.375V 1.8 V

V

OL

Output Low Voltage; NOTE 1 0.5 V

NOTE 1: Outputs terminated with 50Ω to V

DDO

/2. See Parameter Measurement Information section,

“Output Load Test Circuit” diagrams.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, V

DD

4.6V

Inputs, V

I

-0.5V to V

DD

+ 0.5 V

Outputs, V

O

-0.5V to V

DDO

+ 0.5V

Package Thermal Impedance, θ

JA

8 Lead SOIC 112.7°C/W (0 lfpm)

8 Lead TSSOP 101.7°C/W (0 lfpm)

Storage Temperature, T

STG

-65°C to 150°C

NOTE: Stresses beyond those listed under Absolute

Maximum Ratings may cause permanent damage to the

device. These ratings are stress speciﬁ cations only. Functional

operation of product at these conditions or any conditions

beyond those listed in the DC Characteristics or AC Charac-

teristics is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect product reliability.

TABLE 3C. LVCMOS / LVTTL DC CHARACTERISTICS, V

DD

= 3.3V ± 5%, V

DDO

= 1.8V ± 5%, TA = -40°C TO 85°C

Symbol Parameter Test Conditions Minimum Typical Maximum Units

V

IH

Input High Voltage OE 2 V

DD

+ 0.3 V

V

IL

Input Low Voltage OE -0.3 0.8 V

I

IH

Input High Current OE V

DD

= V

IN

= 3.465V 5 µA

I

IL

Input Low Current OE V

DD

= 3.465V, V

IN

= 0V -150 µA

V

OH

Output High Voltage

I

OH

= -100µA V

DDO

- 0.2 V

I

OH

= -2mA V

DDO

- 0.45 V

V

OL

Output Low Voltage

I

OL

= 100µA 0.2 V

I

OL

= 2mA 0.45 V

83026BMI-01LFT

83026BMI-01LFT

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