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83904AG-02LF
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
83904-02 Data Sheet
©2016 Integrated Device T
echnology
, Inc
Revision
A March 17, 2016
13
R
ELIABILITY
I
NFORMA
TION
T
RANSIST
OR
C
OUNT
The transistor count f
or 83904-02 is:
205
T
ABLE
7.
θ
JA
VS
. A
IR
F
LO
W
T
ABLE
FOR
16 L
EAD
TSSOP
θ
JA
by
V
elocity (Linear Feet per Minute)
0 1
2.5
Multi-La
yer PCB, JEDEC Standard
T
est Boards
100.3°C/W
96.0°C/W
93.9°C/W
P
A
CKAGE
O
UTLINE
- G S
UFFIX
FOR
16 L
EAD
TSSOP
T
ABLE
8.
P
ACKA
GE
D
IMENSIONS
Reference Document:
JEDEC Publication 95, MO-153
SYMBOL
Millimeters
Minimum
Maximum
N1
6
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
4.90
5.10
E
6.40 BASIC
E1
4.30
4.50
e
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
83904-02 Data Sheet
©2016 Integrated Device T
echnology
, Inc
Revision
A March 17, 2016
14
T
ABLE
9.
O
RDERING
I
NFORMA
TION
P
ar
t/Or
der Number
Marking
P
ackage
Shipping Packa
ging
T
emperature
83904A
G-02LF
3904A02L
16 Lead
“Lead-F
ree”
TSSOP
tube
0°C to 70°C
83904A
G-02LFT
3904A02L
16 Lead
“Lead-F
ree”
TSSOP
tape & reel
0°C to 70°C
83904-02 Data Sheet
©2016 Integrated Device T
echnology
, Inc
Revision
A March 17, 2016
15
REVISION HIST
OR
Y SHEET
Rev
T
able
P
age
Description of Change
Date
A
T9
12
14
Updated Overdriving the Crystal Interface section.
Ordering Information Table - deleted the “ICS” prefi
x in the Part/Order Number column
and corrected the Temperature column.
Updated header/footer.
9/3/10
A
T9
14
Ordering Information - Remov
ed leaded devices.
Updated data sheet f
or
mat.
3/25/15
A
T9
14
Ordering Information - Deleted LF note below table
.
Updated header and f
ooter
.
3/17/16
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
83904AG-02LF
Mfr. #:
Buy 83904AG-02LF
Manufacturer:
IDT
Description:
Clock Buffer Fanout Buffer,2-XTAL /LVCMOS Input
Lifecycle:
New from this manufacturer.
Delivery:
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EMS
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