Clock operation M41T00S
12/28 Doc ID 10772 Rev 5
3 Clock operation
The 8-byte register map (see Ta ble 2 ) is used to both set the clock and to read the date and
time from the clock, in a binary coded decimal format. Seconds, minutes, and hours are
contained within the first three registers.
Bits D6 and D7 of clock register 02h (century/hours register) contain the CENTURY
ENABLE bit (CEB) and the CENTURY bit (CB). Setting CEB to a '1' will cause CB to toggle,
either from '0' to '1' or from '1' to '0' at the turn of the century (depending upon its initial
state). If CEB is set to a '0,' CB will not toggle. Bits D0 through D2 of Register 03h contain
the Day (day of week). Registers 04h, 05h, and 06h contain the date (day of month), month
and years. The eighth clock register is the calibration register (this is described in the clock
calibration section). Bit D7 of register 00h contains the STOP bit (ST). Setting this bit to a '1'
will cause the oscillator to stop. If the device is expected to spend a significant amount of
time on the shelf, the oscillator may be stopped to reduce current drain. When reset to a '0'
the oscillator restarts within one second.
The seven clock registers may be read one byte at a time, or in a sequential block. The
calibration register (address location 07h) may be accessed independently. Provision has
been made to assure that a clock update does not occur while any of the seven clock
addresses are being read. If a clock address is being read, an update of the clock registers
will be halted. This will prevent a transition of data during the READ.
3.1 Clock registers
The M41T00S offers 8 internal registers which contain clock and calibration data. These
registers are memory locations which contain external (user accessible) and internal copies
of the data (usually referred to as BiPORT
™
TIMEKEEPER cells). The external copies are
independent of internal functions except that they are updated periodically by the
simultaneous transfer of the incremented internal copy. The internal divider (or clock) chain
will be reset upon the completion of a WRITE to any clock address.
The system-to-user transfer of clock data will be halted whenever the address being read is
a clock address (00h to 06h). The update will resume either due to a stop condition or when
the pointer increments to any non-clock address (07h).
Clock registers store data in BCD. The calibration register stores data in binary format.
