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25
SPI Status Register Description
All four SPI status registers have Read Access and are default to “0” after poweron or hard reset.
Table 25. Status Register 0 (SR0)
Address
Content
Structure
04h
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Access
R R R R R R R R
Reset
0 0 0 0 0 0 0 0
Data
PAR TW CPfail OPENX OPENY
Where:
R Read only mode access
Reset Status after poweron or hard reset
PAR Parity check
TW Thermal warning
Cpfail Charge pump failure
OPENX Open Coil X detected
OPENY Open Coil Y detected
Remark
: Data is not latched
Table 26. Status Register 1 (SR1)
Address
Content
Structure
05h
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Access R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Data PAR OVCXPT OVCXPB OVCXNT OVCXNB
Where:
R Read only mode access
Reset Status after poweron or hard reset
PAR Parity check
OVXPT Overcurrent detected on X Hbridge: MOTXP terminal, top transistor
OVXPB Overcurrent detected on X Hbridge: MOTXP terminal, bottom transistor
OVXNT Overcurrent detected on X Hbridge: MOTXN terminal, top transistor
OVXNB Overcurrent detected on X Hbridge: MOTXN terminal, bottom transistor
Remark
: Data is latched
Table 27. SPI Status Register 2 (SR2)
Address
Content
Structure
06h
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Access R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Data PAR OVCYPT OVCYPB OVCYYNT OVCYNB TSD
Where:
R Read only mode access
Reset Status after poweron or hard reset
PAR Parity check
OVCYPT Overcurrent detected on Y Hbridge: MOTYP terminal, top transistor
OVCYPB Overcurrent detected on Y Hbridge: MOTYP terminal, bottom transistor
OVCYNT Overcurrent detected on Y Hbridge: MOTYN terminal, top transistor
OVCYNB Overcurrent detected on Y Hbridge: MOTYN terminal, bottom transistor
TSD Thermal shutdown
Remark
: Data is latched
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26
Table 28. SPI Status Register 3 (SR3)
Address
Content
Structure
07h
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Access R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Data PAR MSP[6:0]
Where:
R Read only mode access
Reset Status after poweron or hard reset
PAR Parity check
MSP[6:0] Translator microstep position
Remark
: Data is not latched
Table 29. SPI Status Flags Overview
Flag Mnemonic
Length
(bit)
Related
SPI Register
Comment
Reset
State
Charge pump failure CPFail 1
Status Register 0
‘0’ = no failure
‘1’ = failure: indicates that the charge pump does
not reach the required voltage level.
‘0’
Microstep position MSP [6:0] 7
Status Register 3
Translator microstep position ‘0000000’
OPEN Coil X OPENX 1
Status Register 0
‘1’ = Open coil detected ‘0’
OPEN Coil Y OPENY 1
Status Register 0
‘1’ = Open coil detected ‘0’
OVer Current on X
Hbridge; MOTXN
terminal; Bottom tran.
OVCXNB 1
Status Register 1
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor XNterminal
‘0’
OVer Current on X
Hbridge; MOTXN
terminal; Top tran.
OVCXNT 1
Status Register 1
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor XNterminal
‘0’
OVer Current on X
Hbridge; MOTXP
terminal; Bottom tran.
OVCXPB 1
Status Register 1
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor XPterminal
‘0’
OVer Current on X
Hbridge; MOTXP
terminal; Top tran.
OVCXPT 1
Status Register 1
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor XPterminal
‘0’
OVer Current on Y
Hbridge; MOTYN
terminal; Bottom tran.
OVCYNB 1
Status Register 2
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor YNterminal
‘0’
OVer Current on Y
Hbridge; MOTYN
terminal; Top tran.
OVCYNT 1
Status Register 2
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor YNterminal
‘0’
OVer Current on Y
Hbridge; MOTYP
terminal; Bottom tran.
OVCYPB 1
Status Register 2
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at bottom transistor YPterminal
‘0’
OVer Current on Y
Hbridge; MOTYP
terminal; Top tran.
OVCYPT 1
Status Register 2
‘0’ = no failure
‘1’ = failure: indicates that over current is detected
at top transistor YPterminal
‘0’
Thermal shutdown TSD 1
Status Register 2
‘0’
Thermal warning TW 1
Status Register 0
‘0’
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27
Soldering
Introduction to Soldering Surface Mount Packages
This text gives a very brief insight to a complex
technology. A more in-depth account of soldering ICs can be
found in the AMIS “Data Handbook IC26; Integrated
Circuit Packages” (document order number 9398 652
90011). There is no soldering method that is ideal for all
surface mount IC packages. Wave soldering is not always
suitable for surface mount ICs, or for printed-circuit boards
(PCB) with high population densities. In these situations
re-flow soldering is often used.
Reflow Soldering
Re-flow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied to
the PCB by screen printing, stencilling or pressure-syringe
dispensing before package placement. Several methods
exist for re-flowing; for example, infrared/convection
heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling)
vary between 100 and 200 seconds depending on the heating
method. Typical re-flow peak temperatures range from 215
to 260°C. The top-surface temperature of the packages
should preferably be kept below 230°C.
Wave Soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or PCBs with a high
component density, as solder bridging and non-wetting can
present major problems. To overcome these problems, the
double-wave soldering method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by
a smooth laminar wave.
For packages with leads on two sides and a pitch (e):
1. Larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the PCB;
2. Smaller than 1.27 mm, the footprint longitudinal
axis must be parallel to the transport direction of
the PCB. The footprint must incorporate solder
thieves at the downstream end.
For packages with leads on four sides, the footprint
must be placed at a 45° angle to the transport direction
of the PCB. The footprint must incorporate solder
thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the adhesive
is cured. Typical dwell time is four seconds at 250°C. A
mildly-activated flux will eliminate the need for removal of
corrosive residues in most applications.
Manual Soldering
Fix the component by first soldering two diagonally-
opposite end leads. Use a low voltage (24 V or less)
soldering iron applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300°C.
When using a dedicated tool, all other leads can be
soldered in one operation within two to five seconds
between 270 and 320°C.
Table 30. Soldering Process
Package
Soldering Method
Wave Re-flow (Note 9)
BGA, SQFP Not suitable Suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS Not suitable (Note 10) Suitable
PLCC (Note 11) , SO, SOJ Suitable Suitable
LQFP, QFP, TQFP Not recommended (Notes 11 and 12) Suitable
SSOP, TSSOP, VSO Not recommended (Note 13) Suitable
9. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect
to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture
in them (the so called popcorn effect). For details, refer to the drypack information in the “Data Handbook IC26; Integrated Circuit Packages;
Section: Packing Methods.”
10.These packages are not suitable for wave soldering as a solder joint between the PCB and heatsink (at bottom version) can not be achieved,
and as solder may stick to the heatsink (on top version).
11. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must
incorporate solder thieves downstream and at the side corners.
12. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable
for packages with a pitch (e) equal to or smaller than 0.65 mm.
13. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable
for packages with a pitch (e) equal to or smaller than 0.5 mm.

AMIS30511C5112RG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers 800MA STEPPER DRIVER
Lifecycle:
New from this manufacturer.
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