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74ALVCH16652DGGS

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
1999 Nov 23 3
Philips Semiconductors Product specification
16-bit transceiver/register with dual enable; 3-state 74ALVCH16652
FUNCTION TABLE
See note 1.
Notes
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
↑ = LOW-to-HIGH.
2. The data output functions may be enabled or disabled by various signals at the nOE
AB
and nOE
BA
inputs. Data input
functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock
inputs.
INPUTS DATA I/O
FUNCTION
nOE
AB
nOE
BA
nCP
AB
nCP
BA
nS
AB
nS
BA
nA
0
to nA
7
nB
0
to nB
7
L
L
H
H
HorL
↑
HorL
↑
X
X
X
X
input input
isolation store A and B data
X
H
H
H
↑
↑
HorL
↑
X
L
X
X
input
input
unspecified
(2)
output
store A, hold B
store A in both registers
L
L
X
L
HorL
↑
↑
↑
X
X
X
L
unspecified
(2)
output
input
input
hold A, store B
store B in both registers
L
L
L
L
X
X
X
HorL
X
X
L
H
output input
real-time B data to A bus
stored B data to A bus
H
H
H
H
X
HorL
X
X
L
H
X
X
input output
real-time A data to B bus
stored A data to B bus
H L H or L H or L H H output output stored A data to B bus and
stored B data to A bus
1999 Nov 23 4
Philips Semiconductors Product specification
16-bit transceiver/register with dual enable; 3-state 74ALVCH16652
ORDERING INFORMATION
PINNING
OUTSIDE NORTH
AMERICA
NORTH
AMERICA
PACKAGE
TEMPERATURE
RANGE
PINS PACKAGE MATERIAL CODE
74ALVCH16652DGG ACH16652 DGG −40 to +85 °C 56 TSSOP plastic SOT364-1
PIN SYMBOL DESCRIPTION
1 and 28 1OE
AB
, 2OE
AB
output enable A-to-B
2 and 27 1CP
AB
, 2CP
AB
clock input A-to-B
3 and 26 1S
AB
, 2S
AB
select input A-to-B
5, 6, 8, 9, 10, 12, 13 and 14 1A
0
to 1A
7
‘1A’ data inputs/outputs
4, 11, 18, 25, 32, 39, 46 and 53 GND ground (0 V)
7, 22, 35, 50 V
CC
positive supply voltage
15, 16, 17, 19, 20, 21, 23 and 24 2A
0
to 2A
7
‘2A’ data inputs/outputs
29 and 56 2
OE
BA
, 1OE
BA
output enable B-to-A
30 and 55 2CP
BA
, 1CP
BA
clock input B-to-A
31 and 54 2S
BA
, 1S
BA
select input B-to-A
33, 34, 36, 37, 38, 40, 41 and 42 2B
0
to 2B
7
‘2B’ data inputs/outputs
43, 44, 45, 47, 48, 49, 51 and 52 1B
7
to 1B
0
‘1B’ data inputs/outputs
1999 Nov 23 5
Philips Semiconductors Product specification
16-bit transceiver/register with dual enable; 3-state 74ALVCH16652
Fig.1 Pin configuration.
handbook, halfpage
16652
MNA315
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
52
51
50
55
56
54
53
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
27
28
GND
1A
0
1A
1
V
CC
1A
2
1A
3
1A
4
GND
1A
5
1A
6
1A
7
2A
0
2A
1
2A
2
GND
2A
3
2A
4
2A
5
V
CC
2A
6
2A
7
GND
2S
AB
2CP
AB
1OE
BA
1CP
BA
1S
BA
GND
1B
0
1B
1
V
CC
1B
2
1B
3
1B
4
GND
1B
5
1B
6
1B
7
2B
0
2B
1
2B
2
GND
2B
3
2B
4
2B
5
V
CC
2B
6
2B
7
GND
2S
BA
2CP
BA
2OE
BA
2OE
AB
1OE
AB
1CP
AB
1S
AB
Fig.2 Bus hold circuit.
handbook, halfpage
to internal circuit
MNA318
V
CC
data
input
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

74ALVCH16652DGGS

Mfr. #:
Buy 74ALVCH16652DGGS
Manufacturer:
Nexperia
Description:
Bus Transceivers 16-Bit Transceiver/ Register Duel Enable
Lifecycle:
New from this manufacturer.
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