NCP1339
www.onsemi.com
16
DETAILED OPERATING DESCRIPTION
Introduction
The NCP1339 implements a standard quasi−resonant
current−mode architecture. This component represents the
ideal candidate where low part−count and cost effectiveness
are the key parameters, particularly in low−cost ac−dc
adapters, open−frame power supplies etc. The NCP1339
brings all the necessary components normally needed in
modern power supply designs, bringing several
enhancements such as non−dissipative OPP, brown−out
protection or sophisticated frequency reduction
management for an optimized efficiency over the power
range. Accounting for the new needs of extremely low
standby power requirements, the part includes an automatic
X2−capacitor discharge circuitry which can save the
power−consuming resistors otherwise needed across the
front−end filtering capacitors. The controller is also able to
enter Power Savings Mode (PSM) that is, a deep sleep mode
via its dedicated remote (“REM”) pin.
• High−Voltage start−up: low standby power results
cannot be obtained with the classical resistive start−up
network. In this part, a high−voltage current−source
provides the necessary current at start−up and turns off
afterwards.
• Internal Brown−Out protection: the bulk voltage is
internally sensed via the high−voltage pin monitoring
(pin 14). When V
pin14
is too low, the part stops pulsing.
No re−start attempt is made until V
pin14
recovers its
normal range. At that moment, the brown−out
comparator sends a general reset to the controller
(de−latch occurs) and authorizes to re−start.
• X2−capacitors discharge capability: per IEC−950
standard, the time constant of the front−end filter
capacitors and their associated discharge resistors must
be less than 1 s. This is to avoid electrical stress when
users unplug the converter and inadvertently touch the
power cord terminals. The circuitry for discharging the
X2 capacitors can save the need for discharge resistors,
helping to further save power.
• PSM control: a dedicated pin allows the IC to enter a
deep sleep mode when the REM input pin is brought
above a certain level. This option offers an efficient
means to operate the adapter in a power savings mode
and draw the least input power from the mains in this
mode. When the REM is actively pulled down via a
dedicated optocoupler, the adapter immediately
re−starts. The component that controls PSM is then
active in normal operation (active−ON) and OFF in
PSM (wasting no energy).
• Quasi−resonant, current−mode operation: QR operation
is an efficient mode where the MOSFET turns on when
its drain−source is at the minimum (valley). However,
at light load, the switching frequency tends to get high.
The NCP1339 valley lock−out and frequency foldback
technique eliminate this drawback so that the efficiency
remains at the highest over the power range.
• Valley Lockout: a continuous flow of pulses is not
compatible with no−load/light−load standby power
requirements. To excel in this domain, the controller
observes the feedback pin voltage (FB) and when it
reaches a level of 1.4 V, the circuit enters a valley
lockout mode where the circuit skips a valley. If FB
further decreases, more valleys are skipped until 6
th
valley is reached.
• Frequency Fold−back: if FB continues declining and
reaches 0.8 V, the current setpoint is frozen to V
freeze
and the circuit regulates by modulating the switching
frequency until it reaches 25 kHz (For C, D, E, F, G and
H versions). For I and J versions, the current setpoint is
frozen to (V
IFF
/4) when FB falling and reaches the IFF
voltage (V
IFF
) set on the IFF pin.
• Skip cycle: to avoid acoustic noise, the circuit prevents
the switching frequency from decaying below 25 kHz.
Instead, the circuit contains the power delivery by
entering skip cycle mode when the system would
otherwise need to further lower the switching frequency
below 25 kHz.
• Internal OPP (Over Power Protection): by routing a
portion of the negative voltage present during the
on−time on the auxiliary winding to the OPP pin
(pin 3), the user has a simple and non−dissipative
means to alter the maximum current setpoint as the bulk
voltage increases. If the pin is grounded, no OPP
compensation occurs.
• Internal soft−start: a 4−ms soft−start precludes the main
power switch from being stressed upon start−up. It is
activated whenever a startup sequence occurs including
autorecovery hiccup.
• Fault input: the NCP1339 includes a dedicated fault
input (pin 5). It can be used to sense an overvoltage
condition and latch off the controller by pulling up the
pin above the upper fault threshold, V
Fault(OVP)
,
typically 3.0 V. The controller is also disabled if the
Fault pin voltage, V
Fault
, is pulled below the lower fault
threshold, V
Fault(OTP_in)
, typically 0.4 V. The lower
threshold is normally used for detecting an
overtemperature fault (by the means of an NTC).
• Short−circuit/Overload protection: short−circuit and
especially overload protections are difficult to
implement when a strong leakage inductance between
auxiliary and power windings affects the transformer
(the aux winding level does not properly collapse in
presence of an output short). Here, every time the
internal 0.8−V maximum peak current limit is activated
(or less when OPP is used), an error flag is asserted and
a 160−ms timer begins counting. When the timer has
