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AD5370BSTZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
AD5370
Rev. 0 | Page 9 of 28
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted. Transient currents of up to
60 mA do not cause SCR latch-up.
Table 5.
Parameter Rating
V
DD
to AGND −0.3 V to +17 V
V
SS
to AGND −17 V to +0.3 V
DV
CC
to DGND −0.3 V to +7 V
Digital Inputs to DGND −0.3 V to DV
CC
+ 0.3 V
Digital Outputs to DGND −0.3 V to DV
CC
+ 0.3 V
VREF0, VREF1 to AGND −0.3 V to +5.5 V
VOUT0 through VOUT39 to AGND V
SS
− 0.3 V to V
DD
+ 0.3 V
SIGGND0 through SIGGND4 to AGND −1 V to +1 V
AGND to DGND −0.3 V to +0.3 V
Operating Temperature Range (T
A
)
Industrial (B Version) −40°C to +85°C
Storage −65°C to +150°C
Operating Junction Temperature
(T
J
max)
130°C
θ
JA
Thermal Impedance
64-Lead LFCSP 25°C/W
64-Lead LQFP 45.5°C/W
Reflow Soldering
Peak Temperature 230°C
Time at Peak Temperature 10 sec to 40 sec
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD5370
Rev. 0 | Page 10 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
05813-007
PIN 1
INDICATOR
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
V
SS
VREF1
VOUT38
VOUT39
VOUT8
VOUT9
VOUT10
VOUT11
SIGGND1
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
VOUT18
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CLR
VOUT26
VOUT25
VOUT24
AGND
DGND
DV
CC
SDO
SDI
SCLK
DV
CC
DGND
VOUT7
VOUT6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RESET
BUSY
VOUT27
S
IGGND3
VOUT28
VOUT29
VOUT30
VOUT31
VOUT32
VOUT33
VOUT34
VOUT35
S
IGGND4
VOUT36
VOUT37
V
DD
VOUT5
VOUT4
SIGGND0
VOUT3
VOUT2
VOUT1
VOUT0
VREF0
VOUT23
VOUT22
VOUT21
VOUT20
V
SS
V
DD
SIGGND2
VOUT19
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AD5370
TOP VIEW
(Not to Scale)
LDAC
SYNC
05813-025
V
SS
VREF1
VOUT38
VOUT39
VOUT8
VOUT9
VOUT10
VOUT11
SIGGND1
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
VOUT18
VOUT5
VOUT4
SIGGND0
VOUT3
VOUT2
VOUT1
VOUT0
VREF0
VOUT23
VOUT22
VOUT21
VOUT20
V
SS
V
DD
SIGGND2
VOUT19
VOUT27
SIGGND3
VOUT28
VOUT29
VOUT30
VOUT31
VOUT32
VOUT33
VOUT34
VOUT35
SIGGND4
VOUT36
VOUT37
V
DD
RESET
BUSY
VOUT26
VOUT25
VOUT24
AGND
DGND
DV
CC
SDO
SDI
SCLK
DV
CC
DGND
VOUT7
VOUT6
CLR
LDAC
SYNC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
47
46
45
42
43
44
48
41
40
39
37
36
35
34
33
38
2
3
4
7
6
5
1
8
9
10
12
13
14
15
16
11
17
18
19 20
21 22 23 24 25 26
27
28
29
30 31 32
AD5370
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 6. 64-Lead LFCSP Pin Configuration Figure 7. 64-Lead LQFP Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1
RESET
Digital Reset Input.
2
BUSY BUSY Input/Output (Active Low). BUSY is open-drain when an output. See the BUSY and
LDAC Functions section for more information.
3, 5 to 12, 14, 15, 19 to
24, 26 to 33, 37 to 40, 42
to 45, 47 to 50, 60 to 62
VOUT0 to VOUT39
DAC Outputs. Buffered analog outputs for each of the 40 DAC channels. Each analog
output is capable of driving an output load of 10 kΩ to ground. Typical output impedance
of these amplifiers is 0.5 Ω.
46 SIGGND0 Reference Ground for DAC 0 to DAC 7. VOUT0 to VOUT7 are referenced to this voltage.
25 SIGGND1 Reference Ground for DAC 8 to DAC 15. VOUT8 to VOUT15 are referenced to this voltage.
34 SIGGND2 Reference Ground for DAC 16 to DAC 23. VOUT16 to VOUT23 are referenced to this voltage.
4 SIGGND3 Reference Ground for DAC 24 and DAC 31. VOUT24 to VOUT31 are referenced to this voltage.
13 SIGGND4 Reference Ground for DAC 32 to DAC 39. VOUT32 to VOUT39 are referenced to this voltage.
41 VREF0 Reference Input for DAC 0 to DAC 7. This reference voltage is referred to AGND.
18 VREF1 Reference Input for DAC 8 to DAC 39. This reference voltage is referred to AGND.
AD5370
Rev. 0 | Page 11 of 28
Pin No. Mnemonic Description
16, 35 V
DD
Positive Analog Power Supply; +9 V to +16.5 V for specified performance. These pins
should be decoupled with 0.1 µF ceramic capacitors and 10 µF capacitors.
17, 36 V
SS
Negative Analog Power Supply; −16.5 V to −8 V for specified performance. These pins
should be decoupled with 0.1 µF ceramic capacitors and 10 µF capacitors.
51, 58 DGND Ground for All Digital Circuitry. Both DGND pins should be connected to the DGND plane.
52, 57 DV
CC
Logic Power Supply; 2.5 V to 5.5 V. These pins should be decoupled with 0.1 µF ceramic
capacitors and 10 µF capacitors.
53
SYNC Active Low Input. This is the frame synchronization signal for the serial interface. See the
Timing Characteristics section for more details.
54 SCLK
Serial Clock Input. Data is clocked into the shift register on the falling edge of SCLK. This
pin operates at clock speeds up to 50 MHz. See the
Timing Characteristics section for
more details.
55 SDI
Serial Data Input. Data must be valid on the falling edge of SCLK. See the
Timing
Characteristics
section for more details.
56 SDO
Serial Data Output for SPI Interface. CMOS output. SDO can be used for readback. Data is
clocked out on SDO on the rising edge of SCLK and is valid on the falling edge of SCLK.
59 AGND Ground for All Analog Circuitry. The AGND pin should be connected to the AGND plane.
63
LDAC
Load DAC Logic Input (Active Low).
64
CLR Asynchronous Clear Input (Level Sensitive, Active Low). See the Clear Function section for
more information.
Exposed Paddle
The lead-free chip scale package (LFCSP) has an exposed paddle on the underside. The
paddle should be connected to V
SS
.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

AD5370BSTZ

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Buy AD5370BSTZ
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 40-CH 16-bit Serial bipolar IC
Lifecycle:
New from this manufacturer.
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