Data Sheet ADRF5160
Rev. 0 | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. EXPOSED PAD. EXPOSED PAD MUST BE
CONNECTED TO RF/DC GROUND.
24 GND
23
GND
22 GND
21
RF2
20
GND
19
GND
18 GND
17 GND
1
2
3
4
5
6
7
8
GND
GND
GND
RF1
GND
GND
GND
GND
9
10
11
12
13
14
15
16
GND
GND
GND
RFC
GND
GND
GND
GND
32
31
30
29
28
27
26
25
GND
GND
GND
V
DD
V
CTL
GND
GND
GND
ADRF5160
TOP VIEW
(Not to Scale)
16518-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 to 3, 5 to 11, 13 to 20, 22 to 27, 30 to 32 GND Ground. The package bottom has an exposed metal pad that must connect to
the PCB RF/dc ground.
4 RF1 RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is
required on this pin. See Figure 3 for the interface schematic.
RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking
capacitor is required on this pin. See Figure 3 for the interface schematic.
21 RF2 RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is
required on this pin. See Figure 3 for the interface schematic.
28 V
CTL
Control Input Pin. See Figure 4 for the V
CTL
interface schematic. Refer to Table 5
for the signal path and the recommended input control voltage range shown in
Table 1.
29 V
DD
Supply Voltage Pin.
EPAD Exposed Pad. Exposed pad must be connected to RF/dc ground.
INTERFACE SCHEMATICS
Figure 3. RFC, RF1, and RF2 Interface Schematic
V
CT
L
V
DD
V
DD
16518-004
Figure 4. Control Input (V
CTL
) Interface Schematic
