MT41J512M8THD-187E:D

PDF: 09005aef83188bab/Source: 09005aef83169de6 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT41J1G4_64M_32M_twindie.fm - Rev. F 11/09 EN
10 ©2008 Micron Technology, Inc. All rights reserved.
4Gb: x4, x8 TwinDie DDR3 SDRAM
Electrical Specifications
Notes: 1. MAX operating case temperature. T
C
is measured in the center of the package
(see Figure 5).
2. A thermal solution must be designed to ensure the DRAM device does not exceed the max-
imum T
C
during operation.
3. Device functionality is not guaranteed if the DRAM device exceeds the maximum T
C
during
operation.
4. If T
C
exceeds 85°C, the DRAM must be refreshed externally at 2X refresh, which is a 3.9µs
interval refresh rate. The use of self refresh temperature (SRT) or automatic self refresh
(ASR), if available, must be enabled.
Notes: 1. Thermal resistance data is based upon a number of samples from multiple lots and should
be viewed as a typical number.
Figure 5: Temperature Test Point Location
Table 5: Thermal Characteristics
Parameter/Condition Symbol Value Units Notes
Operating case temperature
T
C
0 to 85 °C 1, 2, 3
0 to 95 °C 1, 2, 3, 4
Table 6: Thermal Impedance
Die Rev Package Substrate
θJA (°C/W)
Airflow =
0m/s
θJA (°C/W)
Airflow =
1m/s
θJA (°C/W)
Airflow =
2m/s θJB (°C/W) θJC (°C/W) Notes
A 82-ball 2-layer 46.0 33.9 28.1 25.6 1.73 1
4-layer 34.2 27.1 23.6 23.2
D 78-ball 2-layer 61.0 43.7 37.3 27.1 2.8 1
4-layer 44.5 35.3 31.5 23.2
Test point
Length (L)
Width (W)
0.5 (W)
0.5 (L)
PDF: 09005aef83188bab/Source: 09005aef83169de6 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT41J1G4_64M_32M_twindie.fm - Rev. F 11/09 EN
11 ©2008 Micron Technology, Inc. All rights reserved.
4Gb: x4, x8 TwinDie DDR3 SDRAM
Electrical Specifications
I
DD
Specifications and Conditions
Notes: 1. I
CDD
values reflect the combined current of both individual die. I
DDx
represents individual
die valueS.
Table 7: DDR3 I
CDD
Specifications and Conditions – Rev. A
Note 1 applies to the entire table.
Combined
Symbol Individual Die Status Width
-25/
-25E
-187/
-187E
-15/
-15E Units
I
CDD0
I
CDD0
= I
DD0
+ I
DD2P0
+ 5 x4 92 107 117 mA
x8
117 137 147 mA
I
CDD1
I
CDD1
= I
DD1
+ I
DD2P0
+ 5 x4 117 132 147 mA
x8 132 152 172 mA
I
CDD2P0
(slow exit)
I
CDD2P0
= I
DD2P0
+ I
DD2P0
x4/x8242424mA
I
CDD2P1
(fast exit)
I
CDD2P1
= I
DD2P1
+ I
DD2P0
42 47 52 mA
I
CDD2Q
I
CDD2Q
= I
DD2Q
+ I
DD2P0
x4/x8677787mA
I
CDD2N
I
CDD2N
= I
DD2N
+ I
DD2P0
x4/x8728292mA
I
CDD2NT
I
CDD2NT
= I
DD2NT
+ I
DD2P0
77 87 97 mA
I
CDD3P
I
CDD3P
= I
DD3P
+ I
DD2P0
x4/x8626777mA
I
CDD3N
I
CDD3N
= I
DD3N
+ I
DD2P0
x4/x8 82 92 107 mA
I
CDD4W
I
CDD4W
= I
DD4W
+ I
DD2P0
+ 5 x4 212 242 272 mA
x8 277 312 347 mA
I
CDD4R
I
CDD4R
= I
DD4R
+ I
DD2P0
+ 5 x4 192 217 247 mA
x8 212 242 272 mA
I
CDD5B
I
CDD5B
= I
DD5B
+ I
DD2P0
x4/x8 287 302 317 mA
I
CDD6
I
CDD6
= I
DD6
+ I
DD6
x4/x8202020mA
I
CDD6ET
I
CDD6ET
= I
DD6ET
+ I
DD6ET
x4/x8282828mA
I
CDD7
I
CDD7
= I
DD7
+ I
DD2P0
+ 5 x4 337 362 432 mA
x8 417 447 477 mA
I
CDD8
I
CDD8
= 2 × I
DD2P0
+ 4 All 28 28 28 mA
PDF: 09005aef83188bab/Source: 09005aef83169de6 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT41J1G4_64M_32M_twindie.fm - Rev. F 11/09 EN
12 ©2008 Micron Technology, Inc. All rights reserved.
4Gb: x4, x8 TwinDie DDR3 SDRAM
Electrical Specifications
Notes: 1. I
CDD
values reflect the combined current of both individual die. I
DDx
represents individual
die valueS.
Table 8: DDR3 I
CDD
Specifications and Conditions – Rev. D
Note 1 applies to the entire table.
Combined
Symbol Individual Die Status Width
-187/
-187E
-15/
-15E Units
I
CDD0
I
CDD0
= I
DD0
+ I
DD2P0
+ 5 x4 82 87 mA
x8 82 87 mA
I
CDD1
I
CDD1
= I
DD1
+ I
DD2P0
+ 5 x4 102 107 mA
x8 102 107 mA
I
CDD2P0
(slow exit)
I
CDD2P0
= I
DD2P0
+ I
DD2P0
x4/x8 24 24 mA
I
CDD2P1
(fast exit)
I
CDD2P1
= I
DD2P1
+ I
DD2P0
32 37 mA
I
CDD2Q
I
CDD2Q
= I
DD2Q
+ I
DD2P0
x4/x8 42 47 mA
I
CDD2N
I
CDD2N
= I
DD2N
+ I
DD2P0
x4/x8 44 49 mA
I
CDD2NT
I
CDD2NT
= I
DD2NT
+ I
DD2P0
52 57 mA
I
CDD3P
I
CDD3P
= I
DD3P
+ I
DD2P0
x4/x8 42 47 mA
I
CDD3N
I
CDD3N
= I
DD3N
+ I
DD2P0
x4/x8 47 52 mA
I
CDD4W
I
CDD4W
= I
DD4W
+ I
DD2P0
+ 5 x4 147 167 mA
x8 147 167 mA
I
CDD4R
I
CDD4R
= I
DD4R
+ I
DD2P0
+ 5 x4 142 162 mA
x8 142 162 mA
I
CDD5B
I
CDD5B
= I
DD5B
+ I
DD2P0
x4/x8 202 217 mA
I
CDD6
I
CDD6
= I
DD6
+ I
DD6
x4/x8 24 24 mA
I
CDD6ET
I
CDD6ET
= I
DD6ET
+ I
DD6ET
x4/x8 30 30 mA
I
CDD7
I
CDD7
= I
DD7
+ I
DD2P0
+ 5 x4 287 337 mA
x8 287 337 mA
I
CDD8
I
CDD8
= 2 × I
DD2P0
+ 4 All 28 28 mA

MT41J512M8THD-187E:D

Mfr. #:
Manufacturer:
Micron
Description:
IC DRAM 4G PARALLEL 78FBGA
Lifecycle:
New from this manufacturer.
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