MT89L86 Data Sheet
38
Zarlink Semiconductor Inc.
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25
C and are for design aid only: not guaranteed and not subject to production testing.
* High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
AC Electrical Characteristics
†
- Motorola Multiplexed Bus Mode
Voltages are with respect to ground (VSS) unless otherwise stated.
Characteristics Sym. Min. Typ.
‡
Max. Units Test Conditions
1 AS pulse width t
ASW
80 ns
2 Address setup from AS falling t
ADS
2ns
3 Address hold from AS falling t
ADH
2ns
4 Data setup from DTA
Low on Read t
DDR
10 ns C
L
=150 pF
5CS
hold after DS falling t
CSH
0ns
6CS
setup from DS rising t
CSS
0ns
7 Data hold after write t
DHW
8ns
8 Data setup from DS - write
(fast write)
t
DWS
25 ns
9 Valid Data Delay on write
(slow write)
t
SWD
122 ns
10 R/W
setup from DS rising t
RWS
60 ns
11 R/W
hold after DS falling
t
RWH
9ns
12 Data hold after read t
DHR
10 50 90 ns C
L
=150 pF,
R
L
=1 K
13 DS delay after AS falling
t
DSH
10 ns
14 Acknowledgment Delay:
Reading Data Memory
Reading/Writing Conn. Memories
Writing Control & Mode Regs.
Reading from Control & Mode Regs.
t
AKD
560
62/30
25
52
1220
120/53
65
120
ns
ns
ns
ns
C
L
=150 pF
15 Acknowledgment Hold Time t
AKH
50 80 ns C
L
=150 pF,
R
L
=1 K
