Electrical Specifications
Stresses greater than those listed may cause permanent damage to the module. This is a
stress rating only, and functional operation of the module at these or any other condi-
tions outside those indicated in each device's data sheet is not implied. Exposure to ab-
solute maximum rating conditions for extended periods may adversely affect reliability.
Table 9: Absolute Maximum Ratings
Symbol Parameter Min Max Units
V
DD
V
DD
supply voltage relative to V
SS
–0.4 1.975 V
V
IN
, V
OUT
Voltage on any pin relative to V
SS
–0.4 1.975 V
Table 10: Operating Conditions
Symbol Parameter Min Nom Max Units Notes
V
DD
V
DD
supply voltage 1.283 1.35 1.45 V
1.425 1.5 1.575 V 1
V
REFCA(DC)
Input reference voltage command/address bus 0.49 × V
DD
0.5 × V
DD
0.51 × V
DD
V
V
REFDQ(DC)
I/O reference voltage DQ bus 0.49 × V
DD
0.5 × V
DD
0.51 × V
DD
V
I
VTT
Termination reference current from V
TT
–600 – 600 mA
V
TT
Termination reference voltage (DC) – command/
address bus
0.49 × V
DD
-
20mV
0.5 × V
DD
0.51 × V
DD
+
20mV
V 2
I
I
Input leakage current; Any input
0V ≤ V
IN
≤ V
DD
; V
REF
input 0V ≤ V
IN
≤ 0.95V (All other pins not under
test = 0V)
Address in-
puts, RAS#,
CAS#, WE#,
S#, CKE, ODT,
BA, CK, CK#
– – – µA 6
I
OZ
Output leakage current; 0V ≤ V
OUT
≤ V
DD
; DQ and ODT are disabled;
ODT is HIGH
DQ, DQS,
DQS#
–5 0 5 µA
I
VREF
V
REF
supply leakage current; V
REFDQ
= V
DD/2
or
V
REFCA
= V
DD/2
(All other pins not under test = 0V)
–9 0 9 µA
T
A
Module ambient operating tem-
perature
Commercial 0 – 70 °C 3, 4
T
C
DDR3 SDRAM component case op-
erating temperature
Commercial 0 – 95 °C 3, 4, 5
Notes:
1. Module is backward-compatible with 1.5V operation. Refer to device specification for
details and operation guidance.
2. V
TT
termination voltage in excess of the stated limit will adversely affect the command
and address signals’ voltage margin and will reduce timing margins.
3. T
A
and T
C
are simultaneous requirements.
4. For further information, refer to technical note TN-00-08: “Thermal Applications,”
available on Micron’s Web site.
5. The refresh rate is required to double when 85°C < T
C
≤ 95°C.
6. Inputs are terminated to V
DD
/2. Input current is dependent on terminating resistance se-
lected in register.
2GB, 4GB (x72, ECC, SR) 240-Pin DDR3L RDIMM
Electrical Specifications
PDF: 09005aef83b2f73b
ksf9c256_512x72pz.pdf - Rev. I 7/15 EN
13
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© 2009 Micron Technology, Inc. All rights reserved.