10
LTC3819
3819f
FU CTIO AL DIAGRA
UU
W
SWITCH
LOGIC
0.60V
4.8V
5V
V
IN
CLK2
TO SECOND
CHANNEL
CLK1
+
+
V
REF
INTERNAL
SUPPLY
EXTV
CC
INTV
CC
SGND
+
5V
LDO
REG
SW
SHDN
0.55V
TOP
BOOST
TG
C
B
C
IN
D1
D
B
PGND
BOT
BG
INTV
CC
INTV
CC
V
IN
+
3819 FBD
EAIN
V
FB
DROP
OUT
DET
RUN
SOFT-
START
BOT FCB
TOP ON
S
R
Q
Q
OSCILLATOR
PLLFLTR
50k
EA
0.66V
0.60V
OV
1.2µA
6V
+
R
C
5V
FB
RST
SHDN
RUN/SS
I
TH
C
C
C
SS
5V
FB
0.86V
SLOPE
COMP
+
+
SENSE
SENSE
+
INTV
CC
30k
45k
2.4V
45k
R
SENSE
30k
I
1
I
2
B
ATTENIN
5k
R1
VID0
ATTENOUT
NO_CPU
VID1 VID2 VID3 VID4
TYPICAL ALL
VID PINS
40k
V
BIAS
PHASE DET
PLLIN
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
C
C2
+
+
C
OUT
V
OUT
+
f
IN
R
LP
C
LP
DIFFOUT
V
OS
+
V
OS
40k
40k
40k
40k
0.54V
0.66V
+
+
EAIN
PGOOD
5-BIT VID DECODER
+
+
4.5V
0.18µA
+
FCB
3V
FCB
L
43
21
+
A1
11
LTC3819
3819f
OPERATIO
U
(Refer to Functional Diagram)
Main Control Loop
The LTC3819 uses a constant frequency, current mode
step-down architecture with the two output stages oper-
ating 180 degrees out of phase. During normal operation,
each top MOSFET is turned on when the clock for that
channel sets the RS latch, and turned off when the main
current comparator, I
1
, resets the RS latch. The peak
inductor current at which I
1
resets the RS latch is con-
trolled by the voltage on the I
TH
pin, which is the output of
error amplifier EA. The EAIN pin receives the voltage
feedback signal, which is compared to the internal refer-
ence voltage by the EA. When the load current increases,
it causes a slight decrease in V
EAIN
relative to the 0.6V
reference, which in turn causes the I
TH
voltage to increase
until the average inductor current matches the new load
current. After the top MOSFET has turned off, the bottom
MOSFET is turned on until either the inductor current
starts to reverse, as indicated by current comparator I
2
, or
the beginning of the next cycle.
The top MOSFET drivers are biased from floating boot-
strap capacitor C
B
, which normally is recharged during
each off cycle through an external diode when the top
MOSFET turns off. As V
IN
decreases to a voltage close to
V
OUT
, the loop may enter dropout and attempt to turn on
the top MOSFET continuously. The dropout detector de-
tects this and forces the top MOSFET off for about 500ns
every tenth cycle to allow C
B
to recharge.
The main control loop is shut down by pulling the RUN/
SS pin low. Releasing RUN/SS allows an internal 1.2µA
current source to charge soft-start capacitor C
SS
. When
C
SS
reaches 1.5V, the main control loop is enabled with
the I
TH
voltage clamped at approximately 30% of its
maximum value. As C
SS
continues to charge, the I
TH
pin
voltage is gradually released allowing normal, full-current
operation.
Low Current Operation
T
he FCB pin selects between
two
modes of low current
operation. When the FCB pin voltage is below 0.6V, the
controller forces continuous PWM current mode opera-
tion. In this mode, the top and bottom MOSFETs are
alternately turned on to maintain the output voltage inde-
pendent of direction of inductor current. When the FCB pin
is below V
INTVCC
2V but greater than 0.6V, the controller
enters Burst Mode operation. Burst Mode operation sets
a minimum output current level before inhibiting the top
switch and turns off the synchronous MOSFET(s) when
the inductor current goes negative. This combination of
requirements will, at low currents, force the I
TH
pin below
a voltage threshold that will temporarily inhibit turn-on of
both output MOSFETs until the output voltage drops.
There is 60mV of hysteresis in the burst comparator B tied
to the I
TH
pin. This hysteresis produces output signals to
the MOSFETs that turn them on for several cycles, fol-
lowed by a variable “sleep” interval depending upon the
load current. The resultant output voltage ripple is held to
a very small value by having the hysteretic comparator
after the error amplifier gain block.
Constant Frequency Operation
When the FCB pin is tied to INTV
CC
, Burst Mode operation
is disabled and a forced minimum peak output current
requirement is removed. This provides constant frequency,
discontinuous (preventing reverse inductor current) cur-
rent operation over the widest possible output current
range. This constant frequency operation is not as efficient
as Burst Mode operation, but does provide a lower noise,
constant frequency operating mode down to approxi-
mately 1% of designed maximum output current.
Continuous Current (PWM) Operation
Tying the FCB pin to ground will force continuous current
operation. This is the least efficient operating mode, but
may be desirable in certain applications. The output can
source or sink current in this mode. When sinking current
while in forced continuous operation, current will be
forced back into the main power supply potentially boost-
ing the input supply to dangerous voltage levels—
BEWARE!
12
LTC3819
3819f
OPERATIO
U
(Refer to Functional Diagram)
Frequency Synchronization
The phase-locked loop allows the internal oscillator to be
synchronized to an external source via the PLLIN pin. The
output of the phase detector at the PLLFLTR pin is also the
DC frequency control input of the oscillator that operates
over a 140kHz to 310kHz range corresponding to a DC
voltage input from 0V to 2.4V. When locked, the PLL aligns
the turn on of the top MOSFET to the rising edge of the
synchronizing signal. When PLLIN is left open, the PLLFLTR
pin goes low, forcing the oscillator to minimum frequency.
Input capacitance ESR requirements and efficiency losses
are substantially reduced because the peak current drawn
from the input capacitor is effectively divided by two and
power loss is proportional to the RMS current squared. A
two stage, single output voltage implementation can
reduce input path power loss by 75% and radically reduce
the required RMS current rating of the input capacitor(s).
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
of the IC circuitry is derived from INTV
CC
. When the
EXTV
CC
pin is left open, an internal 5V low dropout
regulator supplies INTV
CC
power. If the EXTV
CC
pin is
taken above 4.8V, the 5V regulator is turned off and an
internal switch is turned on connecting EXTV
CC
to INTV
CC
.
This allows the INTV
CC
power to be derived from a high
efficiency external source such as the output of the regu-
lator itself or a secondary winding, as described in the
Applications Information section. An external Schottky
diode can be used to minimize the voltage drop from
EXTV
CC
to INTV
CC
in applications requiring greater than
the specified INTV
CC
current.
Voltages up to 7V can be
applied to EXTV
CC
for additional gate drive capability.
Differential Amplifier
This controller includes a true unity-gain differential am-
plifier. Sensing both V
OUT
+
and V
OUT
benefits regu-
lation in high current applications and/or applications
having electrical interconnection losses. The amplifier is
a unity-gain stable, 2MHz gain-bandwidth, >120dB open-
loop gain design. The amplifier has an output slew rate of
5V/µs and is capable of driving capacitive loads with an
output RMS current typically up to 25mA. The amplifier
is not capable of sinking current and therefore must be
resistively loaded to do so.
Output Overvoltage Protection
An overvoltage comparator, 0V, guards against transient
overshoots (>10%) as well as other more serious condi-
tions that may overvoltage the output. In this case, the top
MOSFET is turned off and the bottom MOSFET is turned on
until the overvoltage condition is cleared.
Power Good (PGOOD)
The PGOOD pin is connected to the drain of an internal
MOSFET. The MOSFET turns on when the output voltage
is not within ±10% of its nominal output level as deter-
mined by the feedback divider. When the output is within
±10% of its nominal value, the MOSFET is turned off within
10µs and the PGOOD pin should be pulled up by an
external resistor to a source of up to 7V.
Short-Circuit Detection
The RUN/SS capacitor is used initially to limit the inrush
current from the input power source. Once the control-
lers have been given time, as determined by the capacitor
on the RUN/SS pin, to charge up the output capacitors
and provide full-load current, the RUN/SS capacitor is
then used as a short-circuit timeout circuit. If the output
voltage falls to less than 70% of its nominal output
voltage the RUN/SS capacitor begins discharging as-
suming that the output is in a severe overcurrent and/or
short-circuit condition. If the condition lasts for a long
enough period as determined by the size of the RUN/SS
capacitor, the controller will be shut down until the
RUN/SS pin voltage is recycled. This built-in latchoff can
be overidden by providing a current >5µA at a compli-
ance of 5V to the RUN/SS pin. This current shortens the
soft-start period but also prevents net discharge of the
RUN/SS capacitor during a severe overcurrent and/or
short-circuit condition. Foldback current limiting is acti-
vated when the output voltage falls below 70% of its
nominal level whether or not the short-circuit latchoff
circuit is enabled.

LTC3819EG#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-Phase Synch Controller w/ VID
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet