13
LTC3819
3819f
APPLICATIO S I FOR ATIO
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The basic LTC3819 application circuit is shown in
Figure 1 on the first page. External component selection
begins with the selection of the inductors based on ripple
current requirements and continues with the current
sensing resistors using the calculated peak inductor
current and/or maximum current limit. Next, the power
MOSFETs, D1 and D2 are selected. The operating fre-
quency and the inductor are chosen based mainly on the
amount of ripple current. Finally, C
IN
is selected for its
ability to handle the input ripple current (that PolyPhase
TM
operation minimizes) and C
OUT
is chosen with low enough
ESR to meet the output ripple voltage and load step
specifications (also minimized with PolyPhase). Current
mode architecture provides inherent current sharing be-
tween output stages. The circuit shown in Figure 1 can be
configured for operation up to an input voltage of 28V
(limited by the external MOSFETs). Current mode control
allows the ability to connect the two output stages to two
different
input power supply rails. A heavy output load can
take some power from
each
input supply according to the
selection of the R
SENSE
resistors.
R
SENSE
Selection For Output Current
R
SENSE1,2
are chosen based on the required peak output
current. The LTC3819 current comparator has a maxi-
mum threshold of 75mV/R
SENSE
and an input common
mode range of SGND to 1.1(INTV
CC
). The current com-
parator threshold sets the peak inductor current, yielding
a maximum average output current I
MAX
equal to the peak
value less half the peak-to-peak ripple current, I
L
.
Assuming a common input power source for each output
stage and allowing a margin for variations in the
LTC3819 and external component values yields:
RN
mV
I
SENSE
MAX
=
50
where N = 2 for 2 phase. For more than 2 phase use the
LTC1629-6 plus the LTC3819.
Operating Frequency
The LTC3819 uses a constant frequency, phase-lockable
architecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fixed current
plus an additional current which is proportional to the
voltage applied to the PLLFLTR pin. Refer to Phase-
Locked Loop and Frequency Synchronization for addi-
tional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 2. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency (see Efficiency Considerations). The maximum
switching frequency is approximately 310kHz.
Figure 2. Operating Frequency vs V
PLLFLTR
OPERATING FREQUENCY (kHz)
120 170 220 270 320
PLLFLTR PIN VOLTAGE (V)
3819 F02
2.5
2.0
1.5
1.0
0.5
0
Inductor Value Calculation and Output Ripple Current
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
MOSFET gate charge and transition losses increase
directly with frequency. In addition to this basic tradeoff,
the effect of inductor value on ripple current and low
current operation must also be considered. The PolyPhase
approach reduces both input and output ripple currents
while optimizing individual output stages to run at a lower
fundamental frequency, enhancing efficiency.
The inductor value has a direct effect on ripple current.
The inductor ripple current I
L
per individual section, N,
decreases with higher inductance or frequency and
increases with higher V
IN
or V
OUT
:
PolyPhase is a registered trademark of Linear Technology Corporation.
14
LTC3819
3819f
I
V
fL
V
V
L
OUT OUT
IN
=
1
where f is the individual output stage operating frequency.
In a 2-phase converter, the net ripple current seen by the
output capacitor is much smaller than the individual
inductor ripple currents due to ripple cancellation. The
details on how to calculate the net output ripple current
can be found in Application Note 77.
Figure 3 shows the net ripple current seen by the output
capacitors for 1- and 2-phase configurations. The output
ripple current is plotted for a fixed output voltage as the
duty factor is varied between 10% and 90% on the x-axis.
The output ripple current is normalized against the induc-
tor ripple current at zero duty factor. The graph can be
used in place of tedious calculations, simplifying the
design process.
generally cannot afford the core loss found in low cost
powdered iron cores, forcing the use of more expensive
ferrite, molypermalloy, or Kool Mµ
®
cores. Actual core
loss is independent of core size for a fixed inductor value,
but it is very dependent on inductor type selected. As
inductance increases, core losses go down. Unfortu-
nately, increased inductance requires more turns of wire
and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple.
Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive
than ferrite. A reasonable compromise from the same
manufacturer is Kool Mµ. Toroids are very space effi-
cient, especially when you can use several layers of wire.
Because they lack a bobbin, mounting is more difficult.
However, designs for surface mount are available which
do not increase the height significantly.
Power MOSFET, D1 and D2 Selection
Two external power MOSFETs must be selected for each
output stage with the LTC3819: one N-channel MOSFET
for the top (main) switch, and one N-channel MOSFET for
the bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
CC
voltage. This voltage is typically 5V during start-up
(see EXTV
CC
Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
IN
< 5V); then, sublogic-level threshold MOSFETs
(V
GS(TH)
< 1V) should be used. Pay close attention to the
BV
DSS
specification for the MOSFETs as well; most of the
logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, reverse transfer capacitance C
RSS
,
input voltage and maximum output current. When the
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Figure 3. Normalized Output Ripple Current
vs Duty Factor [I
RMS
0.3 (I
O(P–P)
)]
DUTY FACTOR (V
OUT
/V
IN
)
0.1 0.2 0.3 0.4
0.5 0.6 0.7 0.8 0.9
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3819 F03
2-PHASE
1-PHASE
I
O(P-P)
V
O
/fL
Accepting larger values of I
L
allows the use of low
inductances, but can result in higher output voltage ripple.
A reasonable starting point for setting ripple current is
I
L
= 0.4(I
OUT
)/2, where I
OUT
is the total load current.
Remember, the maximum I
L
occurs at the maximum
input voltage. The individual inductor ripple currents are
determined by the inductor, input and output voltages.
Inductor Core Selection
Once the values for L1 and L2 are known, the type of
inductor must be selected. High efficiency converters
15
LTC3819
3819f
LTC3819 is operating in continuous mode the duty factors
for the top and bottom MOSFETs of each output stage are
given by:
Main Switch Duty Cycle
V
V
OUT
IN
=
Synchronous Switch Duty Cycle
VV
V
IN OUT
IN
=
The MOSFET power dissipations at maximum output
current are given by:
P
V
V
I
R
kV
I
Cf
MAIN
OUT
IN
MAX
DS ON
IN
MAX
RSS
=
+
()
+
()
()()
2
1
2
2
2
δ
()
P
VV
V
I
R
SYNC
IN OUT
IN
MAX
DS ON
=
+
()
()
2
1
2
δ
where δ is the temperature dependency of R
DS(ON)
and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses but the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
IN
< 20V the
high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
RSS
actual provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
is usually specified in the
MOSFET characteristics. The constant k = 1.7 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
The Schottky diodes, D1 and D2 shown in Figure 1
conduct during the dead-time between the conduction of
the two large power MOSFETs. This helps prevent the
body diode of the bottom MOSFET from turning on,
storing charge during the dead-time, and requiring a
reverse recovery period which would reduce efficiency. A
1A to 3A Schottky (depending on output current) diode is
generally a good compromise for both regions of opera-
tion due to the relatively small average current. Larger
diodes result in additional transition losses due to their
larger junction capacitance.
C
IN
and C
OUT
Selection
In continuous mode, the source current of each top
N-channel MOSFET is a square wave of duty cycle V
OUT
/
V
IN
. A low ESR input capacitor sized for the maximum
RMS current must be used. The details of a closed form
equation can be found in Application Note 77. Figure 4
shows the input capacitor ripple current for a 2-phase
configuration with the output voltage fixed and input
voltage varied. The input ripple current is normalized
against the DC output current. The graph can be used in
place of tedious calculations. The minimum input ripple
current can be achieved when the input voltage is twice the
output voltage.
In the graph of Figure 4, the 2-phase local maximum input
RMS capacitor currents are reached when:
V
V
k
OUT
IN
=
21
4
where k = 1, 2
These worst-case conditions are commonly used for
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the capacitor manufacturer if there is any
question.
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LTC3819EG#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2-Phase Synch Controller w/ VID
Lifecycle:
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