AD7228 Data Sheet
Rev. C | Page 12 of 15
Figure 17 shows typical plots of V
REF
vs. digital code, D
1
, for
three different values of G. With V
IN
= 2.5 V and G = 3, the
voltage at the output varies between 2.5 V and 10 V, giving an
effective 10-bit dynamic range to the other seven converters.
For correct operation of the circuit, it is recommended that
V
SS
is equal to −5 V and R1 be greater than 6.8 kΩ.
4.0
V
REF
(
IN
)
3.5
3.0
2.5
2.0
1.5
1.0
0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255
V
DD
= +15V
V
SS
= –5V
R2 = 3.1Ω
DIGITAL CODE (Decimal Equivalent)
R2 = 2.1Ω
R2 = 1Ω
13034-017
Figure 17. Variation of V
REF
with Feedback Configuration
5 V Single-Supply Operation
The AD7228 can be operated from a single 5 V power supply,
resulting in only slightly degraded accuracy performance from
the device. Figure 18 shows a typical plot of relative accuracy for
the device with V
DD
= 5 V and a reference voltage of 1.23 V. Diff-
erential nonlinearity is an important parameter that retains its
specified performance and remains monotonic over the output
voltage range.
The output transfer function sits on top of the amplifier offset
voltage; there is an initial offset voltage, and the voltage coming
from the output transfer function is added on top of this offset
voltage. Because the reference voltage is reduced, the offset
voltage equals a few LSBs. For devices with a true negative offset
(when V
SS
= −5 V), the transfer function does not move off the
bottom rail for the first few LSBs of code. After this, the transfer
function continues as normal. The relative accuracy plot of
Figure 18 is for a device with a true positive offset.
Maintain the required overhead voltage of 3.5 V between V
DD
and the reference voltage, which limits the reference voltage
range. However, operating the device from a single 5 V supply
reduces the power dissipation considerably (typically to 50 mW).
The digital input threshold levels and digital input currents are
not affected by operating the device from the single 5 V supply.
1.0
ERROR (LSB)
0.5
0
–0.5
1.0
0 32 64 96 128 160 192 224 255
T
A
= 25°C
V
DD
= 5V
V
SS
= 0V
V
REF
= 1.23V
INPUT CODE
13034-018
Figure 18. Relative Accuracy at V
DD
= 5 V
Microprocessor Interfacing
AD7228
3
8085A
1
/
Z80
A15
MREQ
2
A8
ADDRESS
DECODE
ADDRESS BUS
DATA BUS
1
FOR 8085A, DATA BUS NEEDS TO BE DEMULTIPLEXED.
2
Z80 ONLY.
3
ADDITIONAL PINS OMITTED FOR CLARITY.
A2
A1
A0
D0
D7
DB0
DB7
WR
EN
WR
13034-019
Figure 19. AD7228 to 8085A/Z80 Interface
AD7228*
6809/
6502
A15
R/W
A0
ADDRESS
DECODE
ADDRESS BUS
DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY.
A2
A1
A0
D0
D7
DB0
DB7
E OR (1)2
EN
WR
13034-020
Figure 20. AD7228 to 6809/6502 Interface
