AD7273/AD7274
Rev. 0 | Page 24 of 28
APPLICATION HINTS
GROUNDING AND LAYOUT
The printed circuit board that houses the AD7273/AD7274
should be designed so that the analog and digital sections are
separated and confined to certain areas of the board. This design
facilitates using ground planes that can be easily separated.
To provide optimum shielding for ground planes, a minimum
etch technique is generally best. All AGND pins of the AD7273/
AD7274 should be sunk into the AGND plane. Digital and
analog ground planes should be joined in only one place. If the
AD7273/AD7274 are in a system where multiple devices require
an AGND-to-DGND connection, the connection should be
made at only one point, a star ground point, established as close
as possible to the ground pin on the AD7273/AD7274.
Avoid running digital lines under the device, because this
couples noise onto the die. However, the analog ground plane
should be allowed to run under the AD7273/AD7274 to avoid
noise coupling. The power supply lines to the AD7273/AD7274
should use as large a trace as possible to provide low impedance
paths and reduce the effects of glitches on the power supply line.
To avoid radiating noise to other sections of the board,
components with fast-switching signals, such as clocks, should
be shielded with digital ground, and they should never be run
near the analog inputs. Avoid crossover of digital and analog
signals. To reduce the effects of feedthrough within the board,
traces on opposite sides of the board should run at right angles
to each other. A microstrip technique is by far the best method,
but it is not always possible to use this approach with a double-
sided board. In this technique, the component side of the board
is dedicated to ground planes, and signals are placed on the
solder side.
Good decoupling is also important. All analog supplies should
be decoupled with 10 µF ceramic capacitors in parallel with
0.1 µF capacitors to AGND/DGND. To achieve the best results
from these decoupling components, they must be placed as close
as possible to the device, ideally right up against the device. The
0.1 µF capacitors should have low effective series resistance
(ESR) and low effective series inductance (ESI), such as is typical
of common ceramic or surface-mount types of capacitors.
Capacitors with low ESR and low ESI provide a low impedance
path to ground at high frequencies, which allows them to
handle transient currents due to internal logic switching.
EVALUATING THE AD7273/AD7274 PERFORMANCE
The recommended layout for the AD7273/AD7274 is outlined
in the evaluation board documentation. The evaluation board
package includes a fully assembled and tested evaluation board,
documentation, and software for controlling the board from a
PC via the evaluation board controller. The evaluation board
controller can be used in conjunction with the AD7273/AD7274
evaluation board, as well as many other Analog Devices evaluation
boards ending in the CB designator, to demonstrate/evaluate the
ac and dc performance of the AD7273/AD7274.
The software allows the user to perform ac (fast Fourier trans-
form) and dc (histogram of codes) tests on the AD7273/AD7274.
The software and documentation are on a CD shipped with the
evaluation board.
