ADP3190
Rev. 2 | Page 19 of 27 | www.onsemi.com
RAMP RESISTOR SELECTION
The ramp resistor (R
R
) is used for setting the size of the internal
PWM ramp. The value of this resistor is chosen to provide the
best combination of thermal balance, stability, and transient
response. The following expression is used for determining the
optimum value:
k356
pF5m2.453
nH3200.2
3
=
×××
×
=
×××
×
=
R
R
DS
D
R
R
R
CRA
L
R
(19)
where A
R
is the internal ramp amplifier gain, A
D
is the current
balancing amplifier gain, R
DS
is the total low-side MOSFET on
resistance, and C
R
is the internal ramp capacitor value. The
closest standard 1% resistor value is 357 kΩ.
The internal ramp voltage magnitude can be calculated by using
()
()
mV390
kHz330pF5k357
V1.30.10810.2
1
=
××
×−×
=
××
×−×
=
R
SW
RR
VIDR
R
V
fCR
DA
V
(20)
The size of the internal ramp can be made larger or smaller. If it
is made larger, stability and transient response improve, but
thermal balance degrades. Likewise, if the ramp is made
smaller, thermal balance improves at the sacrifice of transient
response and stability. The factor of 3 in the denominator of
Equation 19 sets a ramp size that gives an optimal balance for
good stability, transient response, and thermal balance.
COMP PIN RAMP
A ramp signal on the COMP pin is due to the droop voltage and
output voltage ramps. This ramp amplitude adds to the internal
ramp to produce the following overall ramp signal at the
PWM input:
()
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
×××
×−×
−
=
OXSW
R
RT
RCfn
Dn
V
12
1
(21)
In this example, the overall ramp signal is 0.49 V.
CURRENT-LIMIT SETPOINT
To select the current-limit set point, first find the resistor value
for R
LIM
. The current-limit threshold for the ADP3190 is set with
a 3 V source (V
LIM
) across R
LIM
with a gain of 10.4 mV/µA
(A
LIM
). R
LIM
can be found using
O
LIM
LIMLIM
LIM
RI
R
×
×
=
(22)
For values of R
LIM
greater than 500 kΩ, the current limit can be
lower than expected, so some adjustment of R
LIM
may be needed.
Here, I
LIM
is the average current limit for the output of the supply.
In this example, choosing a peak current limit of 200 A for I
LIM
results in R
LIM
= 156 kΩ, for which 150 kΩ is chosen as the
nearest 1% value.
The limit of the per-phase current limit described earlier is
determined by
()
()
2
R
MAXDS
D
BIASR
MAXCOMP
PHLIM
I
RA
I +
×
−−
≅ (23)
For the ADP3190, the maximum COMP voltage (V
COMP(MAX)
) is
3.3 V, the COMP pin bias voltage (V
BIAS
) is 1.2 V, and the
current-balancing amplifier gain (A
D
) is 5. Using V
R
of 0.49 V
and R
DS(MAX)
of 3 mΩ (low-side on resistance at 150°C), calculate
a per-phase peak current limit of 100 A. Although this number
may seem high, this current level can only be reached with an
absolute short at the output, and the current-limit latch-off
function shuts down the regulator before overheating can occur.
This limit can be adjusted by changing the ramp voltage (V
R
),
but make sure not to set the per-phase limit lower than the
average per-phase current (I
LIM
/n).
The per-phase initial duty cycle limit is determined by
()
RT
BIAS
MAXCOMP
MAX
V
DD
−
×= (24)
In this example, the maximum duty cycle is 0.46.
FEEDBACK LOOP COMPENSATION DESIGN
Optimized compensation of the ADP3190 allows the best possible
response of the regulator’s output to a load change. The basis for
determining the optimum compensation is to make the regulator
and output decoupling appear as an output impedance that is
entirely resistive over the widest possible frequency range,
including dc, and equal to the droop resistance (R
O
).
With the resistive output impedance, the output voltage droops
in proportion to the load current at any load current slew rate.
This ensures optimal positioning and allows minimization of
the output decoupling.
With the multimode feedback structure of the ADP3190, the
feedback compensation must be set to make the converter’s
output impedance, working in parallel with the output
decoupling, to meet this goal. Several poles and zeros created by
the output inductor and decoupling capacitors (output filter)
need to be compensated for.
