µ
PD70F3003A, 70F3025A, 70F3003A(A)
39
Data Sheet U13189EJ5V1DS
(2)
µ
PD70F3025A (X rank)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Operating frequency
φ
Note 1 10 33 MHz
VPP supply voltage VPP1
During flash memory programming
9.7 10.3 10.6 V
VPPL VPP low-level detection –0.5 0.2VDD V
VPPM VPP, VDD level detection 0.8VDD 1.2VDD V
VPPH VPP high-voltage level detection 9.7 10.3 10.6 V
VDD supply current IDD VPP= VPP1
3.0 ×
φ
+ 25
mA
VPP supply current IPP VPP= 10.3 V 200 mA
Step erase time tER Note 1 2s
Overall erase time per area tERA
When the step erase time = 2 s, Note 2
40 s/area
Step writing time tWT Note 3 200
µ
s
Overall writing time per word tWTW
When the step writing time = 200
200 2000
µ
s/word
µ
s (1 word = 4 bytes), Note 4
Number of rewrites per area CERWR 1 erase + 1 write after erase 20
Count/area
= 1 rewrite, Note 5
Notes 1. The recommended setting value of the step erase time is 2 s.
2. The prewrite time prior to erasure and the erase verify time (write-back time) are not included.
3. The recommended setting value of the step writing time is 200
µ
s.
4. 100
µ
s is added to the actual writing time per word. The internal verify time during and after the writing
is not included.
5. When writing initially to shipped products, it is counted as one rewrite for both “erase to write” and “write
only”.
Example (P: Write, E: Erase)
Shipped product → P → E → P → E → P: 3 rewrites
Shipped product → E → P → E → P → E → P: 3 rewrites
Cautions 1. V
PP pull-down resistance value (RVPP) is recommended to be in the range 5 kΩ to 15 kΩ.
2. Set the transfer rate between programmer and device as follows.
CSI0: 0.2 to 1 MHz
UART0: 4,800 to 76,800 bps
Remarks 1. When the PG-FP3 is used, a time parameter required for writing/erasing by downloading parameter
files is automatically set. Do not change the settings unless otherwise specified.
2. Area 0 = 00000H to 1FFFFH, area 1 = 20000H to 3FFFFH
3. The rank is indicated by the 5th character from the left in the lot number.
4. The K, E, P, and X rank products do not support handshake mode. The I rank applies to engineering
samples (ES) only. The operation of an ES is not guaranteed.
5.
φ
: Internal system clock frequency
