CS5521/22/23/24/28
DS317F8 43
1.8 Power Supply Arrangements
The CS5521/22/23/24/28 A/D converters are de-
signed to operate from a single +5 V analog supply
and a single +5 V or +3 V digital supply. A -2.1 V
supply is usually generated from the charge pump
drive to provide power to the instrumentation am-
plifier’s NBV (negative bias voltage) pin.
Figure 21 illustrates the CS5522 connected with a
+5 V analog supply and with the external compo-
nents required for the charge pump drive. This en-
ables the CS5522 to measure ground-referenced
signals with magnitudes down to ±100 mV.
Figure 22 illustrates the CS5522 connected to mea-
sure ground-referenced unipolar signals of a posi-
tive polarity using the 1 V, 2.5 V, and 5 V ranges
on the converter. For the 25 mV, 55 mV, and
100 mV ranges, the signals being digitized must
have a common mode between +1.85 to +2.65 V
(NBV = 0 V).
Although CS5521/22/23/24/28 are optimized for
the measurement of thermocouple outputs, they are
also well suited for the measurement of ratiometric
bridge transducer outputs. Figure 23 illustrates the
CS5522 connected to measure the output of a rati-
ometric differential bridge transducer while operat-
ing from a single +5 V supply. Bridge outputs may
range from 5 mV to 400 mV. See “Digital Gain
Scaling” on page 45 section about manipulating the
gain register to achieve optimum gain scaling.
XOUT
VD+
VA+
VREF+
VREF-
DGNDNBV
AIN1+
SCLK
SDO
SDI
CS5522
XIN
CPD
CS
10
Ω
+5V
Analog
Supply
0.1
μ
F0.1
μ
F
20
19
3
1
AGND
214
11
10
15
12
8
9
135
Optional
Clock
Source
Serial
Data
Interface
7
32.768 ~ 100 kHz
2.5V
Up to ± 100 mV Input
AIN1-
4
10 k
Ω
0.1
μ
F
10
μ
F
1N4148
1N4148
+
BAV199
18
AIN2+
17
AIN2-
16
A1
6
A0
Charge-pump network
for V D + = 5V only and
XIN = 32.768 kHz.
Logic Outputs:
A0 - A1 Switch from
VA+ to AGND.
10 k
Ω
301
Ω
499
Ω
+5V
V+
R
LM334
Absolute
Current
Reference
V-
Cold Junction
BAT85
0.033
μ
F
Figure 21. CS5522 Configured to use on-chip charge pump to supply NBV
CS5521/22/23/24/28
44 DS317F8
XOUT
VD+VA+
VREF+
VREF-
DGNDNBV
AIN1+
AIN1-
SCLK
SDO
SDI
CS5522
XIN
CPD
CS
10
Ω
+5V
Analog
Supply
0.1
μ
F
0.1
μ
F
20
19
3
4
1
AGND
214
11
10
15
12
8
9
135
Optional
Clock
Source
Serial
Data
Interface
7
32.768 ~ 100 kHz
0 to +5V Input
18
AIN2+
17
AIN2-
16
A1
6
A0
+
-
CM = 0 to VA+
Figure 22. CS5522 Configured for ground-referenced Unipolar Signals
XOUT
VD+
VA+
VREF+
VREF-
DGNDNBV
AIN1+
AIN1-
SCLK
SDO
SDI
CS5522
XIN
CPD
CS
10
Ω
+5V
Analog
Supply
0.1
μ
F
0.1
μ
F
+
-
20
19
3
4
1
AGND
2
14
11
10
15
12
8
9
135
Optional
Clock
Source
Serial
Data
Interface
7
32.768 ~ 100kHz
18
AIN2+
17
AIN2-
16
A1
6
A0
Figure 23. CS5522 Configured for Single Supply Bridge Measurement
CS5521/22/23/24/28
DS317F8 45
1.8.1 Charge Pump Drive Circuits
The CPD (Charge Pump Drive) pin of the converter
can be used with external components (shown in
Figure 21) to develop an appropriate negative bias
voltage for the NBV pin. When CPD is used to gen-
erate the NBV, the NBV voltage is regulated with
an internal regulator loop referenced to VA+.
Therefore, any change on VA+ results in a propor-
tional change on NBV. With VA+ = 5 V, NBV’s
regulation is set proportional to VA+ at approxi-
mately -2.1 V.
Figure 24 illustrates a charge pump circuit when
the converters are powered from a +3.0 V digital
supply. Alternatively, the negative bias supply can
be generated from a negative supply voltage or a
resistive divider as illustrated in Figure 25.
For ground-based signals with the instrumentation
amplifier engaged (when in the 25 mV, 55 mV, or
100 mV ranges), the voltage on the NBV pin
should at no time be less negative than -1.8 V or
more negative than -2.5 V. To prevent excessive
voltage stress to the chip when the instrumentation
amplifier isn’t engaged (when in the 1 V, 2.5 V, or
5 V ranges) the NBV voltage should not be more
negative than -2.5 V.
The components in Figure 21 are the preferred
components for the CPD filter. However, smaller
capacitors can be used with acceptable results. The
10 μF ensures very low ripple on NBV. Intrinsic
safety requirements prohibit the use of electrolytic
capacitors. In this case, four 0.47 μF ceramic ca-
pacitors in parallel can be used.
Note: The charge pump is designed to nominally provide
400
μA of current for the instrumentation amplifier
when a 0.033
μF pumping capacitor is used
(XIN = 32.768 kHz). When a larger pumping capaci-
tor is used, the charge pump can source more current
to power external loads. Refer to Applications Note
152 “Using the CS5521/23, CS5522/24/28, and
CS5525/26 Charge Pump Drive for External Loads”
for more details on using the charge pump with exter-
nal loads.
1.9 Digital Gain Scaling
The CS5521/22/23/24 and CS5528 all feature a
gain register capable of being scaled from 0.6 to 4-
2
-22
in decimal. The specified ranges of the con-
verter are defined with a voltage reference of 2.5 V
and the gain register set at approximately 1.0. The
gain register can be manipulated to scale the input
for ranges other than those specified. For example,
when using a 2.5 V voltage reference, and the
25 mV input range setting, the gain register can be
changed from 1.000 to 2.000 (shift the entire regis-
ter contents to the left one position) to achieve an
input span of 12.5 mV. Under this condition the
full span of the converter codes will appear across
a 12.5 mV span. The amount of noise in the con-
Figure 24. Charge Pump Drive Circuit for VD+ = 3 V
-5V
NBV
30.1K
Ω
34.8K
Ω
2N5087
or similar
-5V
2.1K
Ω
2.0K
Ω
NBV
+
10
μ
F
10
μ
F
+
BAT85
BAT85

CS5521-ASZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Analog to Digital Converters - ADC 2-Ch 16-Bit Delta Sigma ADC
Lifecycle:
New from this manufacturer.
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