NXP Semiconductors
SL3S4011_4021
UCODE I²C
SL3S4011_4021 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.5 — 18 September 2018
COMPANY PUBLIC 204935 8 / 30
9.6.1 UCODE I
2
C overall memory map
Table 6. Memory map
Bank address Memory address Type Content Initial
value
Remark
RF I
2
C
00h to 1Fh not accessible via i
2
C reserved kill password all 00h unlocked memoryBank 00
20h to 3Fh not accessible via i
2
C reserved access password all 00h unlocked memory
00h to 0Fh 2000h EPC CRC-16:
refer to Ref. 5
memory mapped calculated CRC
10h to 1Fh 2002h EPC PC 3000h unlocked memory
20h to 2Fh 2004h EPC EPC bit [0 to 15]
[1]
unlocked memory
... EPC ... unlocked memory
B0h to BFh 2016h EPC EPC bit [144 to 159] unlocked memory
1F0h to 1FFh 203Eh EPC download register for the bridge function
Bank 01
EPC
200h to 20Fh 2040h EPC Configuration word, see Section 10.2
00h to 0Fh 4000h TID TID header n.a. locked memory
10h to 1Fh 4002h TID TID header n.a. locked memory
20h to 2Fh 4004h TID XTID_header 0000h locked memory
30h to 3Fh 4006h TID TID serial number
[2]
locked memory
40h to 4Fh 4008h TID TID serial number n.a. locked memory
Bank 10 TID
50h to 5Fh 400Ah TID TID serial number n.a. locked memory
Bank 11
User memory
000h to 00Fh 6000h UM user memory bit [0 to 15] all 00h unlocked memory
010h to 01Fh 6002h UM user memory bit [16 to 31] all 00h unlocked memory
... UM all 00h unlocked memory
CF0h to CFFh 619Eh UM user memory bit [3311 to 3327] all 00h unlocked memory
[1] SL3S4011 EPC: E200 680D 0000 0000 0000 0000 0000 0000 0000 0000
SL3S4021 EPC: E200 688D 0000 0000 0000 0000 0000 0000 0000 0000
[2] see TID paragraph
