MAX3892ETH+T

General Description
The MAX3892 serializer is ideal for converting 4-bit-
wide, 622Mbps parallel data to 2.5Gbps serial data in
DWDM and SONET/SDH applications. A 4
4-bit FIFO
allows for any static delay between the parallel output
clock and parallel input clock. Delay variation up to a
unit interval (UI) is allowed after reset. A fully integrated
phase-locked loop (PLL) synthesizes an internal
2.5GHz serial clock from a 622MHz, 155.5MHz,
77.8MHz, or 38.9MHz reference clock. A selectable
dual VCO allows excellent jitter performance at both
SONET and forward-error correction (FEC) data rates.
Operating from a single 3.3V supply, this device
accepts low-voltage differential-signal (LVDS) clock and
data inputs for interfacing with high-speed digital circuit-
ry, and delivers current-mode logic (CML) serial data
and clock outputs. A loopback data output is provided
to facilitate system diagnostic testing. The MAX3892 is
available in the extended temperature range (-40°C to
+85°C) in 44-pin QFN and TQFN packages.
Applications
SONET/SDH OC-48 Transmission Systems
WDM Transponders
Add/Drop Multiplexers
Dense Digital Cross-Connects
Backplane Interconnects
Features
Single +3.3V Supply
455mW Power Consumption
1.4ps
RMS
Maximum Jitter Generation
4 4-Bit FIFO Input Buffer
622Mbps/666Mbps Parallel to 2.5Gbps/2.7Gbps
Serial Conversion
622MHz/667MHz or 311MHz/333MHz Clock Input
On-Chip Clock Synthesizer
Multiple Clock Reference Frequencies:
(622.08MHz, 155.52MHz, 77.76MHz, 38.88MHz) or
(666.51MHz, 166.63MHz, 83.31MHz, 41.66MHz)
LVDS Parallel Clock and Data Inputs
CML Serial Data and Clock Outputs
Additional CML Output for System Loopback
Testing
MAX3892
+3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1
Serializer with Clock Synthesis
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-2215; Rev 6; 10/07
EVALUATION KIT
AVAILABLE
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART
TEMP
RANGE
PIN-
PACKAGE
PKG
CODE
MAX3892EGH
-40°C to +85°C
44 QFN G4477-3
MAX3892ETH+
-40°C to +85°C
44 TQFN T4477-3
PDI0+
PDI0-
PDI3+
PDI3-
RCLK+
RCLK-
CLKSET
FIL
RESET
RATESET
SDO+
SDO-
SCLKO+
SCLKO-
SLBEN
SLBO+
SLBO-
PCLKI+
PCLKI-
PCLKO+
PCLKO-
MODE
FIFOERROR LOL
SONET/SDH
FRAMER
LVPECL
LVDS
LVDS
LVDS
CML
CML
CML
VCCVCO
VCCVCO
LASER
DRIVER
OPTIONAL
FOR
SYSTEM
LOOPBACK
TEST
TTL
C
Z
THIS SYMBOL REPRESENTS A TRANSMISSION
LINE OF CHARACTERISTIC IMPEDANCE Z
O
= 50Ω.
SLBPD
MAX3273
MAX3882
V
CC
MAX3892
1:4 DESERIALIZER
WITH CDR
100Ω
Typical Application Circuit
+
Denotes a lead-free package.
MAX3892
+3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1
Serializer with Clock Synthesis
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, differential LVDS load = 100Ω ±1%, T
A
= +25°C,
unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage V
CC
, VCCO, VCCVCO .....................-0.5V to +5V
All Inputs and FIL .......................................-0.5V to (V
CC
+ 0.5V)
LVDS Output Voltage (PCLKO±)................-0.5V to (V
CC
+ 0.5V)
CML Output Current (SDO±, SCLKO±, SLBO±) ................22mA
Continuous Power Dissipation (T
A
= +85°C)
44-Pin QFN (derate 25mW/°C above +85°C) ............1625mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Current I
CC
(Note 2) 138 190 mA
LVDS INPUT SPECIFICATIONS (PDI[3..0]±, PCLKI±)
Input Voltage Range V
I
0 2400 mV
Differential Input Voltage |V
ID
| 100 mV
Input Common-Mode Current LVDS input V
OS
= 1.2V 61 µA
Threshold Hysteresis 45 mV
Differential Input Resistance R
IN
83 100 117 Ω
LVPECL INPUT SPECIFICATIONS (RCLK±)
Input High Voltage V
IH
V
CC
-
1.16
V
CC
-
0.88
V
Input Low Voltage V
IL
V
CC
-
1.81
V
CC
-
1.48
V
Input Bias Voltage V
CC
- 1.3 V
Single-Ended Input Resistance >1.0 kΩ
Differential Input Voltage Swing 300 1900 mV
P-P
LVDS OUTPUT SPECIFICATIONS (PCLKO±)
Output High Voltage V
OH
1.475 V
Output Low Voltage V
OL
0.925 V
Differential Output Voltage |V
OD
| 250 400 mV
Change in Magnitude of
Differential Output Voltage for
Complementary States
Δ|V
OD
| 25 mV
Offset Output Voltage 1.125 1.275 V
Change in Magnitude of Output
Offset Voltage for Complementary
States
Δ|V
OS
| 25 mV
MAX3892
+3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1
Serializer with Clock Synthesis
_______________________________________________________________________________________ 3
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, differential LVDS loads = 100Ω ±1%, CML loads =
50Ω ±1%, T
A
= +25°C, unless otherwise noted.) (Note 3)
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, differential LVDS load = 100Ω ±1%, T
A
= +25°C,
unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Differential Output Resistance 80 140 Ω
Output Current Shorted together 12 mA
Output Current Shorted to ground 40 mA
CML OUTPUT SPECIFICATIONS (SDO±, SCLKO±, SLBO±)
Differential Output R
L
= 100Ω differential 640 800 1000 mV
P-P
Differential Output Resistance 83 100 117 Ω
Output Common-Mode Voltage R
L
= 50Ω to V
CC
V
CC
- 0.2 V
LVTTL SPECIFICATIONS (RESET, RATESET, SLBEN, SLBPD FIFOERROR, LOL)
Input High Voltage V
IH
2.0 V
Input Low Voltage V
IL
0.8 V
Input High Current I
IH
-30 +10 µA
Input Low Current I
IL
-50 +10 µA
Output High Voltage V
OH
I
OH
= 20µA 2.4 V
CC
V
Output Low Voltage V
OL
I
OL
= 1mA 0.4 V
PROGRAMMING INPUTS (CLKSET, MODE)
Input Current Input = 0 or V
CC
-500 +500 µA
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PARALLEL INPUT SPECIFICATIONS (PDI±, PCLKI±)
RATESET = GND 622
Parallel Input Data Rate
RATESET = V
CC
666
Mbps
MODE = OPEN or V
CC
622
Parallel Input Clock Rate
MODE = SHORT or 30kΩ to GND 311
MHz
Parallel Input Setup Time t
SU
(Note 4) -94 ps
Parallel Input Hold Time t
H
(Note 4) 300 ps
PARALLEL CLOCK OUTPUT SPECIFICATIONS (PCLKO±)
Parallel Clock Output Rise/Fall
Time
t
r
, t
f
20% to 80% 100 200 ps
Parallel Clock Output Duty Cycle 46 54 %
SERIAL OUTPUT SPECIFICATIONS (SDO±, SCLKO±)
RATESET = GND 2.488
Serial Output Data Rate
RATESET = V
CC
2.666
Gbps
Serial Data Output Rise/Fall Time t
r
, t
f
20% to 80% 80 ps
Serial Output Clock to Data Delay t
CLK-Q
(Note 5) -25 25 ps

MAX3892ETH+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Serializers & Deserializers - Serdes 3.3V 2.5/2.7Gbps SDH /SONET 4:1 Serial
Lifecycle:
New from this manufacturer.
Delivery:
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