Revision History
Rev 0; 11/01: Original data sheet release.
Rev 1; 5/03: Page 1: added package code; page 11: updated package drawing.
Rev 2; 3/06: Page 1: updated Typical Application Circuit; page 6: corrected pin numbers for V
CC
and VCCVCO;
page 10: corrected pin names.
Rev 3; 6/06: Page 4: updated AC table for JG conditions/typ, PJ conditions, DJ conditions, and added new
Note 7; page 5: added new TOC5.
Rev 4; 12/06: Page 1: removed future status from MAX3882 in Typical Application Circuit; page 5: updated
TOC3.
Rev 5; 2/07: Page 1: added lead-free package to Ordering Information table.
Rev 6; 10/07: Page 1: clarified that the MAX3892EHT+ is a TQFN package; page 10: added TQFN to the Pin
Configuration; pages 11–12: removed package drawings and replaced with package type table.
MAX3892
+3.3V, 2.5Gbps/2.7Gbps, SDH/SONET 4:1
Serializer with Clock Synthesis
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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11
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