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AD5582YRVZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
REV. A
a
AD5582/AD5583
Quad, Parallel Input, Voltage Output,
12-/10-Bit Digital-to-Analog Converters
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
FEATURES
12-Bit Linearity and Monotonic AD5582
10-Bit Linearity and Monotonic AD5583
Wide Operating Range: Single 5 V to 15 V or
Dual 5 V Supply
Unipolar or Bipolar Operation
Double Buffered Registers Enable Independent or
Simultaneous Multichannel Update
4 Independent Rail-to-Rail Reference Inputs
20 mA High Current Output Drive
Parallel Interface
Data Readback Capability
5 s Settling Time
Built-In Matching Resistor Simplifies
Negative Reference
Unconditionally Stable Under Any Capacitive Loading
Compact Footprint: TSSOP-48
Extended Temperature Range: 40C to 125C
APPLICATIONS
Process Control Equipment
Closed-Loop Servo Control
Data Acquisition Systems
Digitally Controlled Calibration
Optical Network Control Loops
4 m to 20 mA Current Transmitter
GENERAL DESCRIPTION
The AD5582/AD5583 family of quad, 12-/10-bit, voltage output
digital-to-analog converters is designed to operate from a single
5 V to 15 V or dual ±5 V supply. It offers the user ease of use in
single- or dual-supply systems. Built using an advance BiCMOS
process, this high performance DAC is dynamically stable, capable
of high current drive, and in small form factor.
The applied external reference V
REF
determines the full-scale out-
put voltage ranges from V
SS
to V
DD
, resulting in a wide selection
of full-scale outputs. For multiplying and wide dynamic appli-
cations, ac reference inputs can be as high as |V
DD
– V
SS
|. Two
built-in precision trimmed resistors
are available and can be
configured easily to provide four-
quadrant multiplications.
A doubled-buffered parallel interface offers a fast settling time.
A common level sensitive load DAC strobe (LDAC) input allows
additional simultaneous update of all DAC outputs. An external
asynchronous reset (RS) forces all registers to the zero code state
when the MSB = 0 or to midscale when the MSB = 1.
Both parts are offered in the same pinout and package to allow
users to select the appropriate resolution for a given application
without PCB layout changes.
The AD5582 is well suited for DAC8412 replacement in medium
voltage applications in new designs, as well as any other general
purpose multichannel 10- to 12-bit applications.
The AD5582/AD5583 are specified over the extended industrial
(–40∞C to +125∞C) temperature range and offered in a thin and
compact 1.1 mm TSSOP-48 package.
AD5582 FUNCTIONAL BLOCK DIAGRAM
44
VOD
–
+
33
A1
32
A0
31
DB11
30
DB10
29
DB9
28
DB8
26
DB7
25
DB6
24
DB5
23
DB4
21
DB3
20
DB2
19
DB1
18
DB0
34
CS
35
R/W
14
DV
DD
17
MSB
16
RS
15
LDAC
I
N
T
E
R
F
A
C
E
OE
CONTROL
LOGIC
22
DGND1
27
DGND2
36
DGND3
40
V
REFHD
39
V
REFLD
41
V
REFHC
42
V
REFLC
45
V
SS2
46
V
DD2
D
O
IN
REG
D
I
47
VOC
3
V
DD1
4
V
SS1
5
VOA
2
VOB
11
R1
12
RCT
13
R2
20k
20k
1
AGND1
48
AGND2
DAC
REG
ADDR
DECODE
38
V
DD3
37
V
SS3
4 4
AD5582
–
+
10
V
REFLA
9
V
REFHA
7
V
REFLB
8
V
REFHB
ADR421
REF
DAC A
2.5V
DAC B
2.5V
DAC C
2.5V
DAC D
2.5V
AD5582/AD5583
V
REFHA
V
REFHB
V
REFHC
V
REFHD
V
REFLA
V
REFLB
V
REFLC
V
REFLD
2.5V
R1
R2
–
+
2.5V
RCT
DIGITAL CIRCUITRY OMITTED FOR CLARITY
Figure 1. Using Built-In Matching Resistors
to Generate a Negative Voltage Reference
REV. A–2–
AD5582/AD5583–SPECIFICATIONS
(V
DD
= +5 V, V
SS
= –5 V, DV
DD
= +5 V 10%, V
REFH
= +2.5 V, V
REFL
= –2.5 V,
–40C < T
A
< +125C, unless otherwise noted.)
Parameter Symbol Condition Min Typ
1
Max Unit
STATIC PERFORMANCE
Resolution
2
N AD5582 12 Bits
AD5583 10 Bits
Relative Accuracy
3
INL –1 +1 LSB
Differential Nonlinearity
3
DNL Monotonic –1 LSB
Zero-Scale Error V
ZSE
Data = 000
H
for AD5582 –2 +2 LSB
and AD5583
Gain Error V
GE
Data = 0xFFF
H
for AD5582 –2 +2 LSB
V
GE
Data = 0x3FF
H
for AD5583 –4 +4 LSB
Gain Error V
GE
V
DD
= 2.7 V to 4.5 V –4 +4 LSB
Full-Scale Tempco
4
TCV
FS
1.5 ppm/∞C
REFERENCE INPUT
V
REFH
Input Range V
REFH
V
REFL
+ 0.5 V
DD
V
V
REFL
Input Range
5
V
REFL
V
SS
V
REFH
– 0.5 V
Input Resistance R
REF
Data = 555
H
(Minimum R
REF
)12 20 kW
1
for AD5582 and 155
H
for AD5583
Input Capacitance
4
C
REF
80 pF
REF Input Current I
REF
Data = 555
H
for AD5582 500 mA
REF Multiplying Bandwidth BW
REF
Code = Full Scale 1.3 MHz
R1–R2 Matching R1/R2 AD5582 ± 0.025 %
AD5583 ± 0.100 %
ANALOG OUTPUT
Output Current
6
I
OUT
Data = 800
H
for AD5582 and ± 2mA
200
H
for AD5583, V
OUT
£ 2 mV
Output Current
6
I
OUT
Data = 800
H
for AD5582 and
200
H
for AD5583, V
OUT
£ |–8 mV| +20 mA
V
OUT
£ ± 15 mV –20 mA
Capacitive Load
4, 7
C
L
No Oscillation Note 7 pF
LOGIC INPUTS
Logic Input Low Voltage V
IL
DV
DD
= 5 V ± 10% 0.8 V
DV
DD
= 3 V ± 10% 0.4 V
Logic Input High Voltage V
IH
DV
DD
= 5 V ± 10% 2.4 V
DV
DD
= 3 V ± 10% 2.1 V
Input Leakage Current I
IL
0.01 1 mA
Input Capacitance
4
C
IL
5pF
Output Voltage High V
OH
I
OH
= –0.8 mA 2.4 V
Output Voltage Low V
OL
I
OL
= 1.2 mA, T
A
= 85∞C, 0.4 V
I
OL
= 0.6 mA, DV
DD
= 3 V
I
OL
= 1.0 mA, T
A
= 125∞C, 0.4 V
I
OL
= 0.5 mA, DV
DD
= 3 V
AC CHARACTERISTICS
Output Slew Rate SR Data = Zero Scale to Full Scale 2 V/ms
to Zero Scale
Settling Time
8
t
S
To ± 0.1% of Full Scale 5 ms
DAC Glitch Q Code 7FF
H
to 800
H
to 7FF
H
100 nV-s
for AD5582 and 1FF
H
to 200
H
to 1FF
H
for AD5583
Digital Feedthrough V
OUT
/t
CS
Data = Midscale, CS Toggles at 5 nV-s
f = 16 MHz
Analog Crosstalk V
OUT
/V
REF
V
REF
= 1.5 V dc + 1 V p-p, –80 dB
Data = 000
H
, f = 100 kHz
Output Noise e
N
f = 1 kHz 33 nV/÷Hz
ELECTRICAL CHARACTERISTICS
REV. A
AD5582/AD5583
–3–
ELECTRICAL CHARACTERISTICS
(V
DD
= 15 V, V
SS
= 0 V, DV
DD
= 5 V 10%, V
REFH
= 10 V, V
REFL
= 0 V,
–40C < T
A
< +125C, unless otherwise noted.)
Parameter Symbol Condition Min Typ
1
Max Unit
STATIC PERFORMANCE
Resolution
2
N AD5582 12 Bits
AD5583 10 Bits
Relative Accuracy
3
INL –1 +1 LSB
Differential Nonlinearity
3
DNL Monotonic –1 LSB
Zero-Scale Error V
ZSE
Data = 000
H
for AD5582 –2 +2 LSB
and AD5583
Gain Error V
GE
Data = 0xFFF
H
for AD5582 –2 +2 LSB
V
GE
Data = 0x3FF
H
for AD5583 –4 +4 LSB
Full-Scale Tempco
4
TCV
FS
1.5 ppm/∞C
REFERENCE INPUT
V
REFH
Input Range V
REFH
V
REFL
+ 0.5 V
DD
V
V
REFL
Input Range
5
V
REFL
V
SS
V
REFH
– 0.5 V
Input Resistance R
REF
Data = 555
H
(Minimum R
REF
)12 20 kW
1
for AD5582 and 155
H
for AD5583
Input Capacitance
4
C
REF
80 pF
REF Input Current I
REF
Data = 555
H
for AD5582 1000 mA
REF Multiplying Bandwidth BW
REF
Code = Full Scale 1.3 MHz
R1–R2 Matching R1/R2 AD5582 ± 0.025 %
AD5583 ± 0.100 %
ANALOG OUTPUT
Output Current
6
I
OUT
Data = 800
H
for AD5582 and 2 mA
200
H
for AD5583, V
OUT
£ 2 mV
Output Current
6
I
OUT
Data = 800
H
for AD5582 and
200
H
for AD5583, V
OUT
£ |–8 mV| +20 mA
V
OUT
£ 15 mV –20 mA
Capacitive Load
4, 7
C
L
No Oscillation Note 7 pF
Parameter Symbol Condition Min Typ
1
Max Unit
SUPPLY CHARACTERISTICS
Single-Supply Voltage Range V
DD
V
SS
= 0 V 3 18 V
Dual-Supply Voltage Range V
DD
/V
SS
V
DD
= +2.7 V to +6.5 V, –9 +9 V
V
SS
= –6.5 V to –2.7 V
Digital Logic Supply DV
DD
2.7 8 V
Positive Supply Current
6
I
DD
V
IL
= 0 V, No Load 1.7 3 mA
Negative Supply Current I
SS
V
IL
= 0 V, No Load 1.5 3 mA
Power Dissipation P
DISS
V
IL
= 0 V, No Load 16 30 mW
Power Supply Sensitivity P
SS
V
DD
= ± 5% 30 ppm/V
NOTES
1
Typical specifications represent average readings measured at 25∞C.
2
DAC Output Equation: V
OUT
= V
REFL
+ [(V
REFH
– V
REFL
) D/2
N
], where D = data loaded in corresponding DAC Register A, B, C, D, and N equals the number of bits;
AD5582 = 12 bits, AD5583 = 10 bits. One LSB step voltage = (V
REFH
– V
REFL
)/4096 V and (V
REFH
– V
REFL
)/1024 V for AD5582 and AD5583, respectively.
3
The first two codes (000
H
, 001
H
) of the AD5583 and the first four codes (000
H
, 001
H
, 002
H
, 003
H
) of the AD5582 are excluded from the linearity error measurement
in single-supply operation.
4
These parameters are guaranteed by design and not subject to production testing.
5
Dual-supply operation, V
REFL
= V
SS
, exclude the lowest eight codes for the AD5582 and two codes for the AD5583 for INL and DNL errors.
6
Short circuit output and supply currents are 24 mA and 25 mA, respectively.
7
Part is stable under any capacitive loading conditions.
8
The settling time specification does not apply for negative-going transitions within the last 3 LSBs of ground in single-supply operation.
Specifications subject to change without notice.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

AD5582YRVZ

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Manufacturer:
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Description:
Digital to Analog Converters - DAC IC Quad 12bit Parallel In
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