REV. A
AD5582/AD5583
7
AD5582 PIN CONFIGURATION
1
AD5582
AGND1
48
TOP VIEW
(Not to Scale)
AGND2
2
VOB
47
VOC
3
V
DD1
46
V
DD2
4
V
SS1
45
V
SS2
5
VOA
44
VOD
6
NC
43
NC
7
V
REFLB
42
V
REFLC
8
V
REFHB
41
V
REFHC
9
V
REFHA
40
V
REFHD
10
V
REFLA
39
V
REFLD
11
R1
38
V
DD3
12
RCT
37
V
SS3
13
R2
36
DGND3
14
DV
DD
35
R/W
15
LDAC
34
CS
16
RS
33
A1
17
MSB
32
A0
18
DB0
31
DB11
19
DB1
30
DB10
20
DB2
29
DB9
21
DB3
28
DB8
22
DGND1
27
DGND2
23
DB4
26
DB7
24
DB5
25
DB6
NC = NO CONNECT
AD5582 PIN FUNCTION DESCRIPTIONS*
Pin
No. Mnemonic Description
1 AGND1 Analog Ground for DAC A and B
2 VOB DAC B Output
3V
DD1
Positive Power Supply for DAC A and B
4V
SS1
Negative Power Supply for DAC A and B
5 VOA DAC A Output
6NCNo Connect
7V
REFLB
DAC B Voltage Reference Low Terminal
8V
REFHB
DAC B Voltage Reference High Terminal
9V
REFHA
DAC A Voltage Reference High Terminal
10 V
REFLA
DAC A Voltage Reference Low Terminal
11 R1 R1 Terminal (for Negative Reference)
12 RCT Center Tap Terminal (for Negative Reference)
13 R2 R2 Terminal (for Negative Reference)
14 DV
DD
Power Supply for Digital Circuits
15 LDAC DAC Register Load, Active Low Level Sensitive
16 RS Reset Strobe
17 MSB MSB = 0, Reset to 000
H
.
MSB = 1, Reset to 800
H
.
18 DB0 Data Bit 0
19 DB1 Data Bit 1
20 DB2 Data Bit 2
21 DB3 Data Bit 3
22 DGND1 Digital Ground 1
23 DB4 Data Bit 4
24 DB5 Data Bit 5
Pin
No. Mnemonic Description
25 DB6 Data Bit 6
26 DB7 Data Bit 7
27 DGND2 Digital Ground 2
28 DB8 Data Bit 8
29 DB9 Data Bit 9
30 DB10 Data Bit 10
31 DB11 Data Bit 11
32 A0 Address Input 0
33 A1 Address Input 1
34 CS Chip Select, Active Low
35 R/W Read/Write Mode Select
36 DGND3 Digital Ground 3
37 V
SS3
Negative Power Supply for Analog Switches
38 V
DD3
Positive Power Supply for Analog Switches
39 V
REFLD
DAC D Voltage Reference Low Terminal
40 V
REFHD
DAC D Voltage Reference High Terminal
41 V
REFHC
DAC C Voltage Reference High Terminal
42 V
REFLC
DAC C Voltage Reference Low Terminal
43 NC No Connect
44 VOD DAC D Output
45 V
SS2
Negative Power Supply for DAC C and D
46 V
DD2
Positive Power Supply for DAC C and D
47 VOC DAC C Output
48 AGND2 Analog Ground for DAC C and D
*AD5582 optimizes internal layout design to reduce die area so that all supply voltage pins are required to be connected externally. See Figure 5.
REV. A8
AD5582/AD5583
AD5583 PIN CONFIGURATION
1
AD5583
AGND1
48
TOP VIEW
(Not to Scale)
AGND2
2
VOB
47
VOC
3
V
DD1
46
V
DD2
4
V
SS1
45
V
SS2
5
VOA
44
VOD
6
NC
43
NC
7
V
REFLB
42
V
REFLC
8
V
REFHB
41
V
REFHC
9
V
REFHA
40
V
REFHD
10
V
REFLA
39
V
REFLD
11
R1
38
V
DD3
12
RCT
37
V
SS3
13
R2
36
DGND3
14
DV
DD
35
R/W
15
LDAC
34
CS
16
RS
33
A1
17
MSB
32
A0
18
NC
31
DB9
19
NC
30
DB8
20
DB0
29
DB7
21
DB1
28
DB6
22
DGND1
27
DGND2
23
DB2
26
DB5
24
DB3
25
DB4
NC = NO CONNECT
AD5583 PIN FUNCTION DESCRIPTIONS*
Pin
No. Mnemonic Description
1 AGND1 Analog Ground for DAC A and B
2 VOB DAC B Output
3V
DD1
Positive Power Supply for DAC A and B
4V
SS1
Negative Power Supply for DAC A and B
5 VOA DAC A Output
6NCNo Connect (Do Not Connect Anything
other than Dummy Pad)
7V
REFLB
DAC B Voltage Reference Low Terminal
8V
REFHB
DAC B Voltage Reference High Terminal
9V
REFHA
DAC A Voltage Reference High Terminal
10 V
REFLA
DAC A Voltage Reference Low Terminal
11 R1 R1 Terminal (for Negative Reference)
12 RCT Center Tap Terminal (for Negative Reference)
13 R2 R2 Terminal (for Negative Reference)
14 DV
DD
Power Supply for Digital Circuits
15 LDAC DAC Register Load, Active Low Level Sensitive
16 RS Reset Strobe
17 MSB MSB = 0, Reset to 000
H
.
MSB = 1, Reset to 200
H
.
18 NC No Connect (Do Not Connect Anything
other than Dummy Pad)
19 NC No Connect (Do Not Connect Anything
other than Dummy Pad)
20 DB0 Data Bit 0
21 DB1 Data Bit 1
22 DGND1 Digital Ground 1
23 DB2 Data Bit 2
24 DB3 Data Bit 3
Pin
No. Mnemonic Description
25 DB4 Data Bit 4
26 DB5 Data Bit 5
27 DGND2 Digital Ground 2
28 DB6 Data Bit 6
29 DB7 Data Bit 7
30 DB8 Data Bit 8
31 DB9 Data Bit 9
32 A0 Address Input 0
33 A1 Address Input 1
34 CS Chip Select, Active Low
35 R/W Read/Write Mode Select
36 DGND3 Digital Ground 3
37 V
SS3
Negative Power Supply for Analog Switches
38 V
DD3
Positive Power Supply for Analog Switches
39 V
REFLD
DAC D Voltage Reference Low Terminal
40 V
REFHD
DAC D Voltage Reference High Terminal
41 V
REFHC
DAC C Voltage Reference High Terminal
42 V
REFLC
DAC C Voltage Reference Low Terminal
43 NC No Connect (Do Not Connect Anything
other than Dummy Pad)
44 VOD DAC D Output
45 V
SS2
Negative Power Supply for DAC C and D
46 V
DD2
Positive Power Supply for DAC C and D
47 VOC DAC C Output
48 AGND2 Analog Ground for DAC C and D
*AD5583 optimizes internal layout design to reduce die area so that all supply voltage pins are required to be connected externally. See Figure 5.
REV. A
AD5582/AD5583
9
TIMING DIAGRAMS
DATA1
VA LI D
DATA2
VA LI D
DATA3
VA LI D
DATA4
VA LI D
ADDRESS
ONE
ADDRESS
TWO
ADDRESS
THREE
ADDRESS
FOUR
CS
R/W
ADDRESS
LDAC
DATA IN
t
CSP
=
10ns
t
WCS
=
20ns
t
WS
=
35ns
t
AS
=
35ns
t
LS
=
0ns
t
WDS
=
35ns
t
WH
=
0ns
t
LH
=
0ns
t
WDH
=
0ns
Figure 2a. Single Buffer Mode, Output Updated Individually, DV
DD
= 5 V
DATA1
VA LI D
DATA2
VA LI D
DATA3
VA LI D
DATA4
VA LI D
ADDRESS
ONE
ADDRESS
TWO
ADDRESS
THREE
ADDRESS
FOUR
CS
R/W
ADDRESS
LDAC
DATA IN
t
CSP
=
10ns
t
WCS
=
20ns
t
WS
=
35ns
t
AS
=
35ns
t
WDS
=
35ns
t
WH
=
0ns
t
WDH
=
0ns
t
LDH
=
0ns
t
LDW
=
20ns
t
LDS
=
0ns
Figure 2b. Double Buffer Mode, Output Updated Simultaneously, DV
DD
= 5 V

AD5582YRVZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC IC Quad 12bit Parallel In
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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