AR0331
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9
Table 4. PIN DESCRIPTION, 48 ILCC (continued)
Pin Number DescriptionTypeName
11 EXTCLK Input External Input Clock
12 VDD Power Digital Power
13 DGND Digital Ground
14 VDD_IO Power I/O Supply Power
15 SDATA I/O Two-wire Serial Data I/O
16 SCLK Input Two-wire Serial Clock Input
17 TEST
Manufacturing Test Enable Pin (Connect to DGND)
18 RESET_BAR Input Asynchronous Reset (Active LOW). All Settings are Restored to Factory Default
19 VDD Power Digital Power
20 DGND Power Digital Ground
21 VDD_IO Power I/O Supply Power
22 NC
23 SADDR Input Two-wire Serial Address Select. 0: 0x20. 1: 0x30
24 NC
25 OE_BAR Output Enable (active LOW)
26 TRIGGER Input Receives Slave Mode VD Signal for Frame Rate Synchronization and Trigger to
Start a GRR Frame
27 FLASH Output Flash Output Control
28 DGND Power
29 VDD_PLL Power PLL Power
30 Reserved
31 AGND Power Analog Ground
32 VAA Power Analog Power
33 Reserved
34 SHUTTER Output Control for External Mechanical Shutter. Can be Left Floating if not Used
35 VAA_PIX Power Pixel Power
36 VAA_PIX Power Pixel Power
37 NC
38 VAA Power Analog Power
39 NC
40 NC
41 VAA Power Analog Power
42 AGND Power Analog Ground
43 DGND Power Digital Ground
44 SLVS3_P Output HiSPi Serial Data, Lane 3, Differential P
45 SLVS3_N Output HiSPi Serial Data, Lane 3, Differential N
46 SLVS2_P Output HiSPi Serial Data, Lane 2, Differential P
47 SLVS2_N Output HiSPi Serial Data, Lane 2, Differential N
48 SLVSC_P Output HiSPi Serial DDR Clock Differential P
