LTC3769
13
3769fa
For more information www.linear.com/LTC3769
OPERATION
The typical capture range of the LTC3769’s PLL is from
approximately 55kHz to 1MHz, and is guaranteed to lock
to an external clock source whose frequency is between
75kHz and 850kHz.
The typical input clock thresholds on the PLLIN/MODE
pin are 1.6V (rising) and 1.2V (falling). The recommended
maximum amplitude for low level and minimum amplitude
for high level of external clock are 0V and 2.5V, respectively.
Operation When V
IN
> Regulated V
OUT
When V
IN
rises above the regulated V
OUT
voltage, the boost
controller can behave differently depending on the mode,
inductor current and V
IN
voltage. In forced continuous
mode, the control loop works to keep the top MOSFET on
continuously once V
IN
rises above V
OUT
. The internal charge
pump delivers current to the boost capacitor to maintain
a sufficiently high TG voltage. The amount of current the
charge pump can deliver is characterized by two curves
in the Typical Performance Characteristics section.
In pulse-skipping mode, if V
IN
is between 100% and
110% of the regulated V
OUT
voltage, TG turns on if the
inductor current rises above a certain threshold and turns
off if the inductor current falls below this threshold. This
threshold current is set to approximately 6%, 4% or
3% of the maximum ILIM current when the ILIM pin is
grounded, floating or tied to INTV
CC
, respectively. If the
controller is programmed to Burst Mode operation under
this same V
IN
window, then TG remains off regardless of
the inductor current.
If the OVMODE pin is grounded and V
IN
rises above 110%
of the regulated V
OUT
voltage in any mode, the controller
turns on TG regardless of the inductor current. In Burst
Mode operation, however, the internal charge pump turns
off if the chip is asleep. With the charge pump off, there
would be nothing to prevent the boost capacitor from
discharging, resulting in an insufficient TG voltage needed
to keep the top MOSFET completely on. To prevent exces
-
sive power dissipation across the body diode of the top
MOSFET in this situation, the chip can be switched over
to forced continuous mode to enable the charge pump;
a Schottky diode can also be placed in parallel with the
top MOSFET
.
Power Good
The PGOOD pin is connected to an open drain of an
internal N-channel MOSFET. The MOSFET turns on and
pulls the PGOOD pin low when the VFB pin voltage is not
within ±10% of the 1.2V reference voltage. The PGOOD
pin is also pulled low when the corresponding RUN pin
is low (shut down). When the VFB pin voltage is within
the ±10% requirement, the MOSFET is turned off and the
pin is allowed to be pulled up by an external resistor to a
source of up to 6V (abs max).
Overvoltage Mode Selection
The OVMODE pin is used to select how the LTC3769
operates during an overvoltage event, defined as when
the output feedback voltage (V
FB
) is greater than 110%
of its normal regulated point of 1.2V. It is also used to
determine the light-load mode of operation when the
LTC3769 is synchronized to an external clock through the
PLLIN/MODE pin.
The OVMODE pin is a logic input that should normally be
tied to INTV
CC
or grounded. Alternatively, the pin can be
left floating, which allow a weak internal resistor to pull
it down to ground.
OVMODE = INTV
CC
: An overvoltage event causes the
error amplifier to pull the ITH pin low. In Burst Mode
operation, this causes the LTC3769 to go to sleep and TG
and BG are held off. In pulse-skipping mode, BG is held
off and TG will turn on if the inductor current is positive.
In forced continuous mode, TG (and BG) will switch on
and off as the LTC3769 will regulate the inductor current
to a negative peak value (corresponding to ITH = 0V) to
discharge the output.
When OVMODE is tied to INTV
CC
, the LTC3769 operates
in pulse-skipping mode when synchronized.
In summary, with OVMODE = INTV
CC
, the inductor cur-
rent is not allowed to go negative (reverse from output to
input) except in forced continuous mode, where it does
reverse current but in a controlled manner with a regulated
negative peak current. OVMODE should be tied to INT
V
CC
in applications where the output voltage may sometimes
be above its regulation point (for example, if the output
LTC3769
14
3769fa
For more information www.linear.com/LTC3769
OPERATION
is a battery or if there are other power supplies driving
the output) and no reverse current flow from output to
input is desired.
OVMODE Grounded or Left Floating: When OVMODE is
grounded or left floating, overvoltage protection is enabled
and TG is turned on continuously until the overvoltage
condition is cleared, regardless of whether Burst Mode
operation, pulse-skipping mode, or forced continuous
mode is selected by the PLLIN/MODE pin. This can cause
large negative inductor currents to flow from the output
to the input if the output voltage is higher than the input
voltage.
Note however that in Burst Mode operation, the LTC3769
is in sleep during an overvoltage condition, which disables
the internal oscillator and BOOST-SW charge pump. So the
BOOST-SW voltage may discharge (due to leakage) if the
overvoltage conditions persists indefinitely. If BOOST-SW
discharges, then by definition TG would turn off.
When OVMODE is grounded or left floating, the LTC3769
operates in forced continuous mode when synchronized.
OVMODE should be tied to ground or left floating in cir
-
cuits, such as automotive applications, where the input
voltage can often be above the regulated output voltage
and it is desirable to turn on TG to “pass through” the
input voltage to the output.
Operation at Low SENSE Pin Common Mode Voltage
The current comparator in the L
TC3769 is powered directly
from the SENSE
+
pin. This enables the common mode
voltage of the SENSE
+
and SENSE
pins to operate at as
low as 2.3V, which is below the UVLO threshold. Figure 10
shows a typical application in which the controllers VBIAS
is powered from V
OUT
while the V
IN
supply can go as low
as 2.3V. If the voltage on SENSE
+
drops below 2.3V, the
SS pin will be held low. When the SENSE voltage returns
to the normal operating range, the SS pin will be released,
initiating a new soft-start cycle.
BOOST Supply Refresh and Internal Charge Pump
The top MOSFET driver is biased from the floating bootstrap
capacitor, C
B
, which normally recharges during each cycle
through an external diode when the bottom MOSFET turns
on. There are two considerations for keeping the BOOST
supply at the required bias level. During start-up, if the
bottom MOSFET is not turned on within 200μs after UVLO
goes low, the bottom MOSFET will be forced to turn on for
~400ns. This forced refresh generates enough BOOST-SW
voltage to allow the top MOSFET ready to be fully enhanced
instead of waiting for the initial few cycles to charge up.
There is also an internal charge pump that keeps the required
bias on BOOST. The charge pump always operates in both
forced continuous mode and pulse-skipping mode. In Burst
Mode operation, the charge pump is turned off during sleep
and enabled when the chip wakes up. The internal charge
pump can normally supply a charging current of 55μA.
LTC3769
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3769fa
For more information www.linear.com/LTC3769
The Typical Application on the first page is a basic LTC3769
application circuit. The LTC3769 can be configured to use
either inductor DCR (DC resistance) sensing or a discrete
sense resistor (R
SENSE
) for current sensing. The choice
between the two current sensing schemes is largely a
design trade-off between cost, power consumption and
accuracy. DCR sensing is becoming popular because it
does not require current sensing resistors and is more
power-efficient, especially in high current applications.
However, current sensing resistors provide the most
accurate current limits for the controller. Other external
component selection is driven by the load requirement,
and begins with the selection of R
SENSE
(if R
SENSE
is used)
and inductor value. Next, the power MOSFETs are selected.
Finally, input and output capacitors are selected.
SENSE
+
and SENSE
Pins
The SENSE
+
and SENSE
pins are the inputs to the cur-
rent comparators. The common mode input voltage range
of the
current comparators is 2.3V to 60V. The current
sense resistor is normally placed at the input of the boost
controller in series with the inductor.
APPLICATIONS INFORMATION
The SENSE
+
pin also provides power to the current com-
parator. It draws ~200μA during normal operation. There
is a small base current of less than 1μA that flows into
the SENSE
pin. The high impedance SENSE
input to the
current comparators allows accurate DCR sensing.
Filter components mutual to the sense lines should be
placed close to the LTC3769, and the sense lines should
run close together to a Kelvin connection underneath the
current sense element (shown in Figure 1). Sensing cur
-
rent elsewhere can effectively add parasitic inductance
and capacitance to the current sense element, degrading
the information at the sense terminals and making the
programmed current limit unpredictable. If DCR sensing
is used (Figure 2b), resistor R1 should be placed close to
the switching node, to prevent noise from coupling into
sensitive small-signal nodes.
Figure 1. Sense Lines Placement with
Inductor or Sense Resistor
(2a) Using a Resistor to Sense Current (2b) Using the Inductor DCR to Sense Current
Figure 2. Two Different Methods of Sensing Current
V
IN
TO SENSE FILTER,
NEXT TO THE CONTROLLER
INDUCTOR OR R
SENSE
3769 F01
TG
SW
BG
LTC3769
INTV
CC
BOOST
SENSE
+
SENSE
(OPTIONAL)
VBIAS
V
IN
V
OUT
GND
3769 F02a
TG
SW
BG
INDUCTOR
DCR
L
LTC3769
INTV
CC
BOOST
SENSE
+
SENSE
R2C1
R1
VBIAS
V
IN
V
OUT
PLACE C1 NEAR SENSE
PINS
GND
3769 F02b
(R1
||
R2) C1 =
L
DCR
R
SENSE(EQ)
= DCR •
R2
R1 + R2

LTC3769MPUF#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 60V L IQ Sync Boost Cntr
Lifecycle:
New from this manufacturer.
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