LTC4267-1
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transformer jack on the PD since this would compromise
the 802.3af isolation safety requirements.
Figure 16 demonstrates three methods of diode ORing
external power into a PD. Option 1 inserts power before
the LTC4267-1 interface controller while options 2 and
3 bypass the LTC4267-1 interface controller section and
power the switching regulator directly.
If power is inserted before the LTC4267-1 interface con-
troller, it is necessary for the wall transformer to exceed
the LTC4267-1 UVLO turn-on requirement and include a
transient voltage suppressor (TVS) to limit the maximum
voltage to 57V. This option provides input current limit
for the transformer, provides a valid power good signal,
and simplifies power priority issues. As long as the wall
transformer applies power to the PD before the PSE, it
will take priority and the PSE will not power up the PD
because the wall power will corrupt the 25k signature. If
the PSE is already powering the PD, the wall transformer
power will be in parallel with the PSE. In this case, prior-
ity will be given to the higher supply voltage. If the wall
transformer voltage is higher, the PSE should remove the
line voltage since no current will be drawn
from the PSE.
On the other hand, if the wall transformer voltage is lower,
the PSE will continue to supply power to the PD and the
wall transformer will not be used. Proper operation should
occur in either scenario.
If auxiliary power is applied directly to the LTC4267-1
switching regulator (bypassing the LTC4267-1 PD inter-
face), a different set of trade-offs arise. In the configuration
shown in option 2, the wall transformer does not need
to exceed the LTC4267-1 turn-on UVLO requirement;
however, it is necessary to include diode D9 to prevent
the transformer from applying power to the LTC4267-1
interface controller. The transformer voltage requirement
will be governed by the needs of the onboard switching
regulator. However, power priority issues require more
intervention. If the wall transformer voltage is below
the PSE voltage, then priority will be given to the PSE
power. The LTC4267-1 interface controller will draw power
from the PSE while the transformer will sit unused. This
configuration is not a problem in a PoE system. On the
other hand, if the wall transformer voltage is higher than
the PSE voltage, the LTC4267-1 switching regulator will
draw power from the transformer. In this
situation, it is
necessary to address the issue of power cycling that may
occur if a PSE is present. The PSE will detect the PD and
apply power. If the switcher is being powered by the wall
transformer, then the PD will not meet the minimum load
requirement and the PSE will subsequently remove power.
The PSE will again detect the PD and power cycling will
start. With a transformer voltage above the PSE voltage,
it is necessary to either disable the signature, as shown
in option 2, or install a minimum load on the output of the
LTC4267-1 interface to prevent power cycling.
The third option also applies power directly to the
LTC4267-1 switching regulator, bypassing the LTC4267-1
interface controller and omitting diode D9. With the
diode omitted, the transformer voltage is applied to the
LTC4267-1 interface controller in addition to the switching
regulator. For this reason, it is necessary to ensure that
the transformer maintain the voltage between 38V and 57V
to keep the LTC4267-1 interface controller in its normal
operating range. The third option has the advantage of
automatically disabling the 25k signature resistor when
the external voltage exceeds the PSE voltage.
Power-Up Sequencing the
LTC4267-1
The LTC4267-1 consists of two functional cells, the PD
interface and the switching regulator, and the power up
sequencing of these two cells must be carefully considered.
The PD designer should ensure that the switching regulator
does not begin operation until the interface has completed
charging up the load capacitor. This will ensure that the
switcher load current does not compete with the load
capacitor charging current provided by the PD interface
current limit circuit. Overlooking this consideration may
result in slow power supply ramp up, power-up oscillation,
and possibly thermal shutdown.
The LTC4267-1 includes a power good signal in the PD
interface that can be used to indicate to the switching regu-
lator that the load capacitor is fully charged and ready to
handle the switcher load. Figure 7 shows two examples of
ways the PWRGD signal can be used to control the switch-
ing regulator. The first example employs an N-channel
MOSFET to drive the I
TH
/RUN port below the shutdown
threshold (typically 0.28V). The second example drives
LTC4267-1
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For more information www.linear.com/4267-1
RX
6
RX
+
3
TX
2
TX
+
RJ45
T1
1
7
8
5
4
SPARE
+
SPARE
+
ISOLATED
WALL
TRANSFORMER
TO PHY
V
PORTP
OPTION 1: AUXILIARY POWER INSERTED BEFORE LTC4267-1 PD
OPTION 2: AUXILIARY POWER INSERTED AFTER LTC4267-1 PD WITH SIGNATURE DISABLED
V
PORTN
P
OUT
PGND
PGND
38V TO 57V
D8
S1B
D3
SMAJ58A
TVS
C1
PGND
PGND
C14
0.1µF
100V
RX
6
RX
+
3
TX
2
TX
+
RJ45
T1
1
7
8
5
4
SPARE
+
SPARE
+
ISOLATED
WALL
TRANSFORMER
TO PHY
V
PORTP
SIGDISA
LTC4267-1
LTC4267-1
BR2
HD01
~
~
+
BR1
HD01
~
~
+
BR1
HD01
~
~
+
V
PORTN
P
OUT
42671 F16
D10
S1B
D3
SMAJ58A
TVS
C1
100k
D9
S1B
OPTION 3: AUXILIARY POWER APPLIED TO LTC4267-1 PD AND SWITCHING REGULATOR
RX
6
RX
+
3
TX
2
TX
+
RJ45
T1
1
7
8
5
4
SPARE
+
SPARE
+
ISOLATED
WALL
TRANSFORMER
TO PHY
38V TO 57V
V
PORTP
LTC4267-1
V
PORTN
P
OUT
D10
S1B
D3
SMAJ58A
TVS
C1
C14
0.1µF
100V
C14
0.1µF
100V
BR2
HD01
~
~
+
BR1
HD01
~
~
+
BR2
HD01
~
~
+
100k
BSS63
R
START
C
PVCC
R
START
C
PVCC
R
START
C
PVCC
PGND
P
VCC
PGND
P
VCC
P
VCC
applicaTions inForMaTion
Figure 16. Auxiliary Power Source for PD
LTC4267-1
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applicaTions inForMaTion
P
VCC
below the P
VCC
turn-off threshold. Employing the
second example has the added advantage of adding delay
to the switching regulator start-up beyond the time the
power good signal becomes active. The second example
ensures additional timing margin at start-up without the
need for added delay components. In applications where it
is not desirable to utilize the power good signal, sufficient
timing margin can be achieved with R
START
and C
PVCC
.
R
START
and C
PVCC
should be set to a delay of two to three
times longer than the duration needed to charge up C1.
Layout Considerations for the LTC4267-1
The most critical layout considerations for the LTC4267-1
are the placement of the supporting external components
associated with the switching regulator. Efficiency, stabil-
ity, and load transient response can deteriorate without
good layout practices around critical components.
For the LTC4267-1 switching regulator, the current loop
through C1, T1 primary, Q1, and R
SENSE
must be given
careful layout attention. (Refer to Figure 11.) Because of
the high switching current circulating in this loop, these
components should be placed in close proximity to each
other. In addition, wide copper traces or copper planes
should
be used between these components. If vias are
n
ecessary to complete the connectivity of this loop, placing
multiple vias lined perpendicular to the flow of current is
essential for minimizing parasitic resistance and reducing
current density. Since the switching frequency and the
power levels are substantial, shielding and high frequency
layout techniques should be employed. A low current,
low impedance alternate connection should be employed
between the PGND pins of the LTC4267-1 and the PGND
side of R
SENSE
, away from the high current loop. This
Kelvin sensing will ensure an accurate representation of
the sense voltage is measured by the LTC4267-1.
The placement of the feedback resistors R1 and R2 as
well as the compensation capacitor C
C
is very important
in the accuracy of the output voltage, the stability of the
main control loop, and the load transient response. In
an isolated design application, R1, R2, and C
C
should be
placed as close as possible to the error amplifier’s input
with minimum trace lengths and minimum capacitance. In
a nonisolated application, R1, and R2 should be placed as
close as possible to the V
FB
pin of the LTC4267-1 and C
C
should be placed close to the I
TH
/RUN pin of the LTC4267-1.
In essence, a tight overall layout of the high current loop
and careful attention to current density will ensure suc-
cessful operation of the LTC4267-1 in a PD.
Place C14 (Figure 9) as close as physically possible to the
LTC4267-1 across V
PORTP
and V
PORTN
. Place the series
10Ω resistor close to C14. Excessive parasitic capacitance
on the R
CLASS
pin should be avoided. The SIGDISA pin is
adjacent to the V
PORTP
pin and any coupling, whether resis-
tive or capacitive may inadvertently disable the signature
resistance. To ensure consistent behavior, the SIGDISA
pin should be electrically connected and not left floating.
Voltages in a PD can be as large as 57V, so high voltage
layout techniques should be employed.

LTC4267CGN-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE802.3af PD w/Switching Reg.
Lifecycle:
New from this manufacturer.
Delivery:
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