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STGIPS14K60T
P1-P3
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P19-P19
Electrical ch
aracteristics
STG
IPS14K60T
10/19
DocID018534 Rev 5
Note:
X: do
n’t care
T
able 1
1. S
hut down cha
racteristics (V
CC
= 15 V unles
s otherwise spe
cified)
Symbol
Parameter
T
e
st conditions
Min.
T
yp.
Max.
Unit
t
sd
Shut down to high / low side
driver propagation delay
V
OUT
= 0, V
boot
= V
CC
,
V
IN
= 0 to 3.3 V
50
125
200
ns
T
ab
le 12. T
ru
th table
Condition
Logic input (V
I
)
Output
SD
LIN
HIN
L
VG
HVG
Shutdown enable
half-bridge tri-stat
e
L
X
X
L
L
Interlocking
half-bridge tri-stat
e
H
L
H
L
L
0 ‘’logic state”
half-bridge tri-stat
e
H
H
L
L
L
1 “logic state”
low side direct driving
H
L
L
H
L
1 “logic state”
high side direct driving
H
H
H
L
H
Figure
5.
Maximum
I
C(RMS
)
current
vs
.
switching
frequency
(1)
Figure 6. Maximu
m I
C(RMS
)
current vs. f
SINE
(1)
1.
Simula
ted curv
es refer
to typi
cal IGBT
paramete
rs and
maxim
um R
thj-c.
,
F50
6
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DocID018534 Rev 5
1
1/19
STGIPS14K60
T
Electrical ch
aracteristics
19
3.1.1
NTC thermistor
Equation
1: resistance variation vs. temp
erature
Where T ar
e temperatures
in Kelvins
Figure 7. NTC r
esistance vs. temperature
Figure 8.
NTC resistance vs. temper
ature (zoom)
T
abl
e 13. NTC t
hermistor
Symbol
Parameter
T
est conditions
Min.
T
y
p.
Max.
Unit.
R
25
Resistance
T
= 25°C
4.7
k
Ω
R
125
Resistance
T
= 125°C
160
Ω
B
B-c
onstant
T
= 25°C to 85°C
3950
K
T
Operating temperature
-40
150
°C
R
T
(
)
R
25
e
B
1
T
-
-
-
1
298
-
-
-
-
-
-
-
-
-
-
–
⋅
=
AM17168v1
NTC [k
Ω
]
MAX.
MIN.
0
20
40
60
80
100
120
140
160
180
-40
-20
0
20
40
60
80
100
12
0
140
(°C)
CENTER
AM17169v1
NTC [k
Ω
]
MAX.
MIN.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
50
60
70
80
90
100
110
120
130
14
0
(°C)
CENTER
Electrical ch
aracteristics
STG
IPS14K60T
12/19
DocID018534 Rev 5
3.2
W
a
veform
defin
itions
Figure 9. De
ad time and in
terlocking wave
form definit
ions
LIN
HIN
LVG
HVG
LIN
HIN
LVG
HVG
LIN
HIN
LVG
HVG
LIN
HIN
LVG
HVG
DT
LH
DT
HL
DT
LH
DT
HL
DT
LH
DT
HL
DT
LH
DT
HL
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
INTERLOCKING
INTERLOCKING
CONTROL SIGNAL
EDGES
OVERLAPPED:
INTERLOCKING + DEAD TIME
CONTROL SIGNALS EDGES
SYNCHRONOUS (*):
DEAD TIME
CONTROL SIGNALS EDGES
NOT OVERLAPPED,
BUT INSIDE THE DEAD
TIME:
DEAD TIME
CONTROL SIGNALS EDGES
NOT OVERLAPPED,
OUTSIDE THE DEAD TIME:
DIRECT DRIVING
(*) HIN and LIN can be connected together and driven b
y just one control signal
INTERLOCKING
INTERLOCKING
G
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
gate driver outputs OFF
(HALF-BRIDGE TRI-STATE)
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STGIPS14K60T
Mfr. #:
Buy STGIPS14K60T
Manufacturer:
STMicroelectronics
Description:
IGBT Modules SLLIMM IPM 3-Phase 14A 600V Rugged IGBT
Lifecycle:
New from this manufacturer.
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