CS5361
DS467F2 13
Figure 18. Left Justified Serial Audio Interface
SDATA 23 22 7 6 23 22
SCLK
LRCK
23 225432108 7654321089 9
Left Channel Right Channel
Figure 19. I
2
S Serial Audio Interface
SDATA 23 22 8 7 23 22
SCLK
LRCK
23 226543210 8765432109 9
Left Channel Right Channel
Figure 20. OVFL Output Timing, I
2
S Format
LRCK
OVFL
SCLK
OVFL_R OVFL_L OVFL_R
Figure 21. OVFL Output Timing, Left-Justified Format
LRCK
OVFL
SCLK
OVFL_R OVFL_L OVFL_R
CS5361
14 DS467F2
2.0 PIN DESCRIPTIONS
RST 124FILT+
M/S 223REFGND
LRCK 322VQ
SCLK 421AINR+
MCLK 520AINR-
VD 619VA
GND 718GND
VL 817AINL-
SDOUT 916AINL+
MDIV 10 15 OVFL
HPF 11 14 M1
I
2
S/LJ 12 13 M0
Pin Name # Pin Description
RST
1
Reset (Input) - The device enters a low power mode when low.
M/S
2
Master/Slave Mode (Input) - Selects operation as either clock master or slave.
LRCK
3
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
SCLK
4
Serial Clock (Input/Output) - Serial clock for the serial audio interface.
MCLK
5
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
VD
6 Digital Power (Input) - Positive power supply for the digital section.
GND
7,18
Ground (Input) - Ground reference. Must be connected to analog ground.
VL
8
Logic Power (Input) - Positive power for the digital input/output.
SDOUT
9
Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
MDIV
10
MCLK Divider (Input) - Enables a master clock divide by two function.
HPF
11
High-pass Filter Enable (Input) - Enables the Digital High-Pass Filter.
I
2
S/LJ
12
Serial Audio Interface Format Select (Input) -Selects either the left-justified or I
2
S format for the SAI.
M0
M1
13,
14
Mode Selection (Input) - Determines the operational mode of the device.
OVFL
15
Overflow (Output, open drain) - Detects an overflow condition on both left and right channels.
AINL+
AINL-
16,
17
Differential Left Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma
modulators via the AINL+/- pins.
VA
19 Analog Power (Input) - Positive power supply for the analog section.
AINR-
AINR+
20,
21
Differential Right Channel Analog Input (Input) -Signals are presented differentially to the delta-sigma
modulators via the AINR+/- pins.
VQ
22
Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.
REF_GND
23
Reference Ground (Input) - Ground reference for the internal sampling circuits.
FILT+
24
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
CS5361
DS467F2 15
FILT+
AINL+
AINL-
V
D
0.01
µ
F
A/D CONVERTER
SCLK
CS5361
M/S
MCLK
AINR+
AINR-
VQ
**47
µ
F
+
RST
VA V
L
+5V
1
µ
F
+5Vto2.5 V
5.1
1
µ
F
+
+ +
SDOUT
GND
I
2
S/LJ
LRCK
GND
Power Down
and Mode
Settings
Audio Data
Processor
Timing Logic
and Clock
0.01
µ
F
0.01
µ
F
0.01
µF
HPF
M0
M1
REFGND
MDI V
+5 V to 3.3 V
1
µ
F 0.01
µF
1
µ
F
+
Analog
Input
Buffer
(Figure 24)
Analog
Input
Buffer
(Figure 24)
OVFL
10 k
VL
*
0.01
µ
F
* Resistor may only
be used if VD is
derived from VA. If
used, do not drive any
other logic from VD.
3.0 TYPICAL CONNECTION DIAGRAM
Figure 22. Typical Connection Diagram

CS5361-KZZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Audio A/D Converter ICs 24-Bit 114dB 192kHz Multi-Bit ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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