CS5361
DS467F2 23
7.0 REVISION HISTORY
Release Date Changes
PP3 Mar 2003 Preliminary datasheet.
PP4 Sept 2004 Include lead-free device ordering info.
F1 Jan 2005 Improve Gain Error specification under Analog Characteristics.
Specify Full-scale Input Voltage in terms of VA under Analog Characteristics.
Update Differential Input Impedance under Analog Characteristics.
Increase maximum THD+N rating for automotive grade devices.
Increase maximum Power-Supply Current, I
A
, under DC Electrical Characteristics.
Reduce maximum Power Consumption under DC Electrical Characteristics.
Update FILT+ Output Impedance specification under DC Electrical Characteristics.
Extend maximum Fs in Single-Speed Mode to 51 kHz.
Extend maximum Fs in Double-Speed Mode to 102 kHz.
Extend maximum Fs in Quad-Speed Mode to 204 kHz.
Decrease maximum SCLK falling to LRCK edge specification in Quad-Speed Mode.
Replace minimum MCLK high/low timing specifications with duty cycle specification.
Replace minimum SCLK high/low timing specifications with duty cycle specification.
F2 Feb 2005 Correct Recommended Analog Input Circuit.
Table 4. Revision History
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to www.cirrus.com
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