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NCV7708FDQR2G

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NCV7708F
www.onsemi.com
13
Overcurrent Detection Shut Down Control Timer
There are two protection mechanisms for output current,
overcurrent and current limit.
1. Current limit − Always active with a typical
threshold of 3 A.
2. Overcurrent Detection − Selectable shutdown time
via Bit 13 with a typical threshold of 1.45 A.
Figure 6 shows the typical performance of a part which
has exceeded the 1.45 A Overcurrent Detection threshold
and started the shutdown control timer. When Bit 13 = 1, the
shutdown time is 25 msec. When Bit 13 = 0, the shutdown
time is 200 msec.
Once an Overcurrent Shutdown Delay Time event has
been detected by the NCV7708F, the timer setting cannot be
interrupted by an attempted change via a SPI command of
Bit 13.
Input Bit 13 Overcurrent Shutdown Delay Time
0
200 msec
1
25 msec
Figure 6. Output Current Shutdown Control
3 A
1.45 A
3 A
1.45 A
OUTx Current
Bit13 = 1
OUTx Current
Bit13 = 0
200 msec
25 msec
(current limit)
(overcurrent)
(current limit)
(overcurrent)
NCV7708F
www.onsemi.com
14
Under Load Detection
The under−load detection is accomplished by monitoring
the current from each output driver. A minimum load current
(this is the maximum detection threshold) is required when
the drivers are turned on. If the under−load circuit detection
threshold has been crossed for more than the under−load
delay time, the bit indicator (output bit #14) will be set to a
1. In addition, the offending driver will be turned off only if
input bit 14 (ULD) is set to 1 (true).
The NCV7708F uses a global under load timer. An under
load condition starts the global under load delay timer. If
under load occurs in another channel after the global timer
has been started, the delay for any subsequent under load
will be the remainder of the initially started timer. The timer
runs continuously with any persistent under load condition.
The under load detect bit is reset by setting input data bit 0,
SRR = 1.
UNDER LOAD DETECTION SHUT DOWN
ULD Input
Bit 14
OUTx ULD
Condition
Output Data Bit 14 Under
Load Detect (ULD) Status
OUTx Status
0 0 0 Unchanged
0 1 1 (Need SRR to reset) Unchanged
1 0 0 Unchanged
1 1 1 (Need SRR to reset) OUTx Latches Off (Need SRR to reset)
Undervoltage Lockout (PSF)
Undervoltage shutdown circuitry monitors the voltage on
the VS1 and VS2 pins. When the Undervoltage Threshold
level has been breached on both or either one of the VSx
supply inputs, output bit 15 (PSF) will be set and all outputs
will turn off.
Turn on/off status is maintained in the logic circuitry.
When proper input voltage levels are re−established, the
programmed outputs will return to programmed operation.
The Power Supply Fail bit is reset by setting input data bit
0, SRR = 1.
UNDERVOLTAGE LOCK OUT (UVLO) SHUT DOWN
VSx UVLO
Condition
Output Data Bit 15 Power Supply Fail (PSF) Status
OUTx Status
0 0 Unchanged
1 1 (Need SRR to reset) All Outputs Off (Remain off until VSx is out of UVLO)
Overvoltage Shutdown (PSF)
Overvoltage shutdown circuitry monitors the voltage on
the VS1 and VS2 pins. When the Overvoltage Threshold
voltage level has been breached on both or either one of the
VSx supply inputs, output bit 15 will be set and, if input bit
15 (OVLO) is set to 1, all drivers will turn off. Turn on/off
status is maintained in the logic circuitry. When proper input
voltage levels are re−established, the programmed outputs
will turn back on. Overvoltage shutdown can be disabled by
using the SPI input bit 15 (OVLO = 0). The Power Supply
Fail bit is reset by setting input data bit 0, SRR = 1.
OVERVOLTAGE LOCK OUT (OVLO) SHUT DOWN
OVLO In-
put Bit 15
VSx OVLO
Condition
Output Data Bit 15 Power
Supply Fail (PSF) Status
OUTx Status
0 0 0 Unchanged
0 1 1 (Need SRR to reset) Unchanged
1 0 0 Unchanged
1 1 1 (Need SRR to reset) All Outputs Latch Off while in OVLO
Return to programmed state out of OVLO
NCV7708F
www.onsemi.com
15
Thermal Shutdown
Six independent thermal shutdown circuits are featured
(one common sensor for each HS and LS transistor pair).
Each sensor has two levels, one to give a Thermal Warning
(TW) and a higher one, Thermal Shutdown, which will shut
the drivers off. When the part reaches the temperature point
of Thermal Warning, the output data bit 0 (TW) will be set
to a 1, and the outputs will remain on. With one or more
sensors detecting the thermal shutdown level, all channels
will be turned off simultaneously. All outputs will return to
normal operation when the part thermally recovers
(Thermal toggling), because the thermal shutdown does not
change the channel selection. The output data bit 0, Thermal
Warning, will latch and remain set, even after cooling, and
is reset by using a software command to input bit 0 (SRR =
1). Since thermal warning precedes a thermal shutdown,
software polling of this bit will allow for load control and
possible prevention of thermal shutdown conditions.
Thermal warning information can be retrieved
immediately without performing a complete SPI access
cycle. Figure 7 displays how this is accomplished. Bringing
the CSB pin from a 1 to a 0 with SI = 0 immediately displays
the information on output data bit 0, thermal warning. As the
temperature of the NCV7708F changes from a condition
from below the thermal warning threshold to above the
thermal warning threshold, the state of the SO pin changes
and this level is available immediately when the CSB goes
to 0. A 0 on SO indicates there is no thermal warning, while
a 1 indicates the IC is above the thermal warning threshold.
This warning bit is reset by setting input data bit 0, SRR =
1.
CSB
SCLK
SO
CSB
SCLK
SO
TWH
NTW
No Thermal WarningThermal Warning High
Tristate Level
Tristate Level
Figure 7. Access to Temperature warning information shows the thermal information is available immediately
with activation of the CSB signal without having to toggle the SCLK line.
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NCV7708FDQR2G

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Buy NCV7708FDQR2G
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers AUTOMOTIVE DRIVER
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New from this manufacturer.
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