NCV7708F
www.onsemi.com
7
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 150°C, 5.5 V < VSx < 40 V, 3.15 V < V
CC
< 5.25 V, EN = V
CC
, unless otherwise specified)
Characteristic UnitMaxTypMinTest ConditionsSymbol
TIMING SPECIFICATIONS
Low Side Turn Off Time
t
lsoff
Vs = 13.2 V, R
load
= 25 W
2.0 5.0
ms
High Side Rise Time t
hsr
Vs = 13.2 V, R
load
= 25 W
4.0 8.0
ms
High Side Fall Time t
hsf
Vs = 13.2 V, R
load
= 25 W
2.0 3.0
ms
Low Side Rise Time t
lsr
Vs = 13.2 V, R
load
= 25 W
1.0 2.0
ms
Low Side Fall Time t
lsf
Vs = 13.2 V, R
load
= 25 W
1.0 3.0
ms
Non−Overlap Time t
hsOfflsOn
High Side Turn Off To Low
Side Turn On
1.5
ms
Non−Overlap Time t
lsOffhsOn
Low Side Turn Off To High
Side Turn On
1.5
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. For temperatures above 85°C, refer to graphs for VSx and V
CC
Sleep Current vs. Temperature on page 17.
6. Thermal characteristics are not subject to production test.
7. Refer to “Typical High−Side Negative Clamp Voltage” graph on page 17.
8. Current limit is active with and without overcurrent detection.
9. Not production tested.
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 150°C, 5.5 V < VSx < 40 V, EN = V
CC
= 5 V, unless otherwise specified)
Characteristic
Conditions Symbol Min Typ Max Unit
SERIAL PERIPHERAL INTERFACE (V
CC
= 5 V)
SCLK Frequency f
SCLK
5.0 MHz
SCLK Clock Period V
CC
= 5 V
V
CC
= 3.3 V
t
SCLK
200
500
ns
SCLK High Time t
CLKH
85 ns
SCLK Low Time t
CLKL
85 ns
SCLK Setup Time t
CLKSU1
t
CLKSU2
85
85
ns
SI Setup Time t
SISU
50 ns
SI Hold Time t
SIHT
50 ns
CSB Setup Time t
CSBSU1
t
CSBSU2
100
100
ns
CSB High Time (Note 10) t
CSBHT
5.0
ms
SO enable after CSB falling edge t
SOCSBF
200 ns
SO disable after CSB rising edge t
SOCSBR
200 ns
SO Rise Time (10% to 90%) C
load
= 40 pF t
SORISE
10 25 ns
SO Fall Time (90% to 10%) C
load
= 40 pF t
SOFALL
10 25 ns
SO Valid Time (Note 11) SCLK High to SO 50% t
SOV
50 100 ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
10.This is the minimum time the user must wait between SPI commands.
11. Not tested in production
NCV7708F
www.onsemi.com
8
Figure 3. SPI Timing Diagram
CSB
SO
TSOCSBF
TSOCSBR
SI
SO
SCLK
TIHT
TISU
TSOV
CSB
SCLK
TCLKSU1
TCLKH TCLKL
TCSBSU1
TCLKSU2
TCSBHT
TCSBSU2
50%
50% 50% 50%50% 50% 50%
50%50%
50% 50%
50% 50%
50% 50%
50%
50% 50%
NCV7708F
www.onsemi.com
9
SPI Communication
Standard 16−bit communication has been implemented
for the communication of this IC to turn drivers on and off,
and to report faults. (Reference the SPI Communication
Frame Format Diagram). The LSB (Least Significant Bit) is
clocked in first.
For SPI communication, the device must first be enabled
(EN = high). The SPI inputs are TTL compatible and the SO
output high level is defined by the applied VCC. The
active-low CSB input has a pull−up resistor. SPI
communication is active when CSB is low. Providing a
pull-up resistor insures the communication bus is not active
should the communication link between the microcontroller
and NCV7708F become open. SCLK and SI have
pull−down resistors. This provides known states when the
SPI is not active.
Communication is implemented as follows:
1. CSB goes low to allow serial data transfer.
2. A 16 bit word is clocked (SCLK) into the SI
(serial input) pin. The SI input signal is latched on
the falling edge of SCLK.
3. Current SO data is simultaneously shifted out on
every rising edge of SCLK starting with the LSB
(TW).
4. CSB goes high to transfer the clocked in
information to the data registers.
(Note: SO is tristate when CSB is high.)
5. The SI data will be accepted when a valid SPI
frame is detected. A valid SPI frame consists of
the above conditions and a complete set of
multiples of 16 bit words. Invalid frames are
ignored with previous input data intact.
Figure 4. SPI Communication Frame Format
SRR
OUT
L1
OUT
H1
OUT
L2
OUT
H2
OUT
L3
OUT
H3
OUT
L4
OUT
H4
OUT
L5
OUT
H5
OUT
L6
OUT
H6
OCD ULD OVLO
ULDOLD
OUT
H6
OUT
L6
OUT
H5
OUT
L5
OUT
H4
OUT
L4
OUT
H3
OUT
L3
OUT
H2
OUT
L2
OUT
H1
OUT
L1
TW PSF
CSB
SI
SCLK
SO
LSB MSB
0123456789101112131415

NCV7708FDQR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers AUTOMOTIVE DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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