DS1961S
28 of 36
Figure 9-2. ROM FUNCTIONS FLOW CHART
To Figure 9
1st Part
From Figure 9
1st Part
From Figure 9
1st Part
To Fi
g
ure 9, 1st Part
Y
N
A5h
Resume
Command ?
RC = 1 ?
Y
N
3Ch
Overdrive
Skip ROM ?
RC = 0 ; OD = 1
Master
TX Reset ?
Y
N
N
Y
Master
TX Reset ?
N
Y
Master TX Bit 0
Master TX Bit 63
Master TX Bit 1
Bit 63
Match ?
RC = 0 ; OD = 1
RC = 1
Bit 1
Match ?
Y
N
Y
N
Bit 0
Match ?
Y
N
Y
N
69h
Overdrive Match
ROM ?
DS1961S
29 of 36
Search ROM [F0h]
When a system is initially brought up, the bus master may not know the number of devices on the 1-Wire
bus or their 64-bit registration numbers. The search ROM command allows the bus master to use a
process of elimination to identify the 64-bit numbers of all slave devices on the bus. The search ROM
process is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write
the desired value of that bit. The bus master performs this 3-step routine on each bit of the registration
number. After one complete pass, the bus master knows the 64-bit number of one device. Additional
passes will identify the registration numbers of the remaining devices. Refer to Chapter 5 of The Book of
DS19xx iButton Standards for a detailed discussion of a search ROM, including an actual example.
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the
memory and SHA functions without providing the 64-bit registration number. If more than one slave is
present on the bus and, for example, a read command is issued following the skip ROM command, data
collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a
wired-AND result).
Resume Command [A5h]
In a typical application the DS1961S needs to be accessed several times to write a full 32-byte page. In a
multidrop environment this means that the 64-bit registration number of a match ROM command has to
be repeated for every access. To maximize the data throughput in a multidrop environment the resume
command function was implemented. This function checks the status of the RC bit and, if it is set,
directly transfers control to the memory and SHA functions, similar to a skip ROM command. The only
way to set the RC bit is through successfully executing the match ROM, search ROM, or overdrive match
ROM command. Once the RC bit is set, the device can repeatedly be accessed through the resume
command function. Accessing another device on the bus clears the RC bit, preventing two or more
devices from simultaneously responding to the resume command function.
Overdrive Skip ROM [3Ch]
On a single-drop bus this command can save time by allowing the bus master to access the memory and
SHA functions without providing the 64-bit registration number. Unlike the normal skip ROM command
the overdrive skip ROM sets the DS1961S in the overdrive mode (OD = 1). All communication following
this command code has to occur at overdrive speed until a reset pulse of minimum 480µs duration resets
all devices on the bus to regular speed (OD = 0). When issued on a multidrop bus this command sets all
overdrive-supporting devices into overdrive mode. To subsequently address a specific overdrive-
supporting device, a reset pulse at overdrive speed has to be issued followed by a match ROM or search
ROM command sequence. This speeds up the search process. If more than one slave supporting overdrive
is present on the bus and the overdrive skip ROM command is followed by a read command, data
collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a
wired-AND result).
Overdrive Match ROM [69h]
The overdrive match ROM command, followed by a 64-bit registration number transmitted at overdrive
speed, allows the bus master to address a specific DS1961S on a multidrop bus and to simultaneously set
it in overdrive mode. Only the DS1961S that exactly matches the 64-bit number responds to the
subsequent memory or SHA function command. Slaves already in overdrive mode from a previous
overdrive skip or a successful overdrive match command will remain in overdrive mode. All overdrive-
capable slaves return to regular speed at the next reset pulse of minimum 480µs duration. The overdrive
match ROM command can be used with single or multiple devices on the bus.
DS1961S
30 of 36
1-WIRE SIGNALING
The DS1961S requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: reset sequence with reset pulse and presence pulse, write 0, write 1, and read data.
Except for the presence pulse the bus master initiates all of these signals. The DS1961S can communicate
at two different speeds: standard speed and overdrive speed. If not explicitly set into the overdrive mode,
the DS1961S communicates at standard speed. While in overdrive mode the fast timing applies to all
waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
PUP
below the threshold V
TL
.
To get from active to idle, the voltage needs to rise from V
ILMAX
past the threshold V
TH
. The voltage
V
ILMAX
is relevant for the DS1961S when determining a logical level, but not for triggering any events.
The initialization sequence required to begin any communication with the DS1961S is shown in Figure
10. A reset pulse followed by a presence pulse indicates the DS1961S is ready to receive data, given the
correct ROM and memory function command. In a mixed population network, the reset low time t
RSTL
needs to be long enough for the slowest 1-Wire slave device to recognize it as a reset pulse. The duration
of t
RSTL
depends on the communication speed and the 1-Wire pull-up voltage (see Electrical
Characteristics). If the bus master uses slew-rate control on the falling edge, it must pull down the line for
t
RSTL
+ t
F
to compensate for the edge. If the DS1961S is in overdrive mode, a standard speed reset pulse
will return the device to standard speed. For the DS1961S to remain in overdrive mode, t
RSTL
must not
exceed the maximum value specified for overdrive speed.
Figure 10. INITIALIZATION PROCEDURE (RESET AND PRESENCE PULSES)
RESISTOR MASTER DS1961S
t
RSTL
t
PDL
t
RSTH
t
PDH
MASTER TX RESET PULSE MASTER RX PRESENCE PULSE
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
e
t
F
t
REC
t
MSP
After the bus master has released the line it goes into receive mode (RX). Now the 1-Wire bus is pulled to
V
PUP
through the pullup resistor or, in case of a DS2480B driver, by active circuitry. When the threshold
V
TH
is crossed, the DS1961S waits for t
PDH
and then transmits a presence pulse by pulling the line low for
t
PDL
. To detect a presence pulse, the master must test the logical state of the 1-Wire line at t
MSP
.
The t
RSTH
window must be at least the sum of t
PDHMAX
, t
PDLMAX
, and t
RECMIN
. Immediately after t
RSTH
is
expired, the DS1961S is ready for data communication. In a mixed population network, t
RSTH
should be
extended to minimum 480µs at standard speed and 48µs at overdrive speed to accommodate other 1-Wire
devices.

DS1961S-F3+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
iButtons & Accessories 1kb Protected EEPROM iButton w/SHA-1 Eng
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet