7
IDT70V631S
High-Speed 3.3V 256K x 18 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Recommended Operating
Temperature and Supply Voltage
(1)
Recommended DC Operating
Conditions with V
DDQ at 2.5V
Absolute Maximum Ratings
(1)
NOTES:
1. V
IL > -1.5V for pulse width less than 10 ns.
2. V
TERM must not exceed VDDQ + 100mV.
3. To select operation at 2.5V levels on the I/Os and controls of a given port, the
OPT pin for that port must be set to V
IL (0V), and VDDQX for that port must be supplied
as indicated above.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
TERM must not exceed VDD + 150mV for more than 25% of the cycle time or
4ns maximum, and is limited to
< 20mA for the period of VTERM > VDD + 150mV.
NOTE:
1. This is the parameter T
A. This is the "instant on" case temperature.
Recommended DC Operating
Conditions with V
DDQ at 3.3V
NOTES:
1. V
IL > -1.5V for pulse width less than 10 ns.
2. V
TERM must not exceed VDDQ + 150mV.
3. To select operation at 3.3V levels on the I/Os and controls of a given port, the
OPT pin for that port must be set to V
IH (3.3V), and VDDQX for that port must be
supplied as indicated above.
Grade
Ambient
Temperature GND V
DD
Commercial 0
O
C to +70
O
C0V3.3V
+
150mV
Industrial -40
O
C to +85
O
C0V3.3V
+
150mV
5622 tbl 04
Symbol Rating Commercial
& Industrial
Unit
V
TE R M
(2)
Terminal Voltage
with Respect to
GND
-0.5 to +4.6 V
T
BIAS
Tem p e r at ur e
Under Bias
-55 to +125
o
C
T
STG
Storage
Tem p e r at ur e
-65 to +150
o
C
I
OUT
DC Output Current 50 mA
5622 tbl 05
Symbol Parameter Min. Typ. Max. Unit
V
DD
Core Supply Voltage 3.15 3.3 3.45 V
V
DDQ
I/O Supply Voltage
(3)
2.4 2.5 2.6 V
V
SS
Ground 0 0 0 V
V
IH
Input High Voltage
(3 )
(Address & Control Inputs)
1.7
____
V
DDQ
+ 100mV
(2 )
V
V
IH
Input High Voltage - I/O
(3 )
1.7
____
V
DDQ
+ 100mV
(2 )
V
V
IL
Input Low Voltage -0.5
(1 )
____
0.7 V
5622 tbl 06
Symbol Parameter Min. Typ. Max. Unit
V
DD
Core Supply Voltage 3.15 3.3 3.45 V
V
DDQ
I/O Supply Voltage
(3)
3.15 3.3 3.45 V
V
SS
Ground 0 0 0 V
V
IH
Input High Voltage
(Address & Control Inputs)
(3)
2.0
____
V
DDQ
+ 150mV
(2)
V
V
IH
Input High Voltage - I/O
(3)
2.0
____
V
DDQ
+ 150mV
(2)
V
V
IL
Input Low Voltage -0.3
(1)
____
0.8 V
5622 tbl 07
NOTES:
1. These parameters are determined by device characterization, but are not
production tested.
2. 3dV references the interpolated capacitance when the input and output switch
from 0V to 3V or from 3V to 0V.
3. C
OUT also references CI/O.
Capacitance
(1)
(TA = +25°C, F = 1.0MHZ) TQFP ONLY
Symbol Parameter Conditions
(2 )
Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 8 pF
C
OUT
(3)
Output Capacitance V
OUT
= 3dV 10.5 pF
5622 tbl 08
IDT70V631S
High-Speed 3.3V 256K x 18 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
8
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(VDD = 3.3V ± 150mV)
NOTE:
1. At V
DD < - 2.0V input leakages are undefined.
2. V
DDQ is selectable (3.3V/2.5V) via OPT pins. Refer to p.5 for details.
Symbol Parameter Test Conditions
70V631S
UnitMin. Max.
|I
LI
| Input Leakage Current
(1 )
V
DDQ
= Max., V
IN
= 0V to V
DDQ
___
10 µA
|I
LO
| Output Leakage Current
CE
0
= V
IH
or CE
1
= V
IL
, V
OUT
= 0V to V
DDQ
___
10 µA
V
OL
(3.3V) Output Low Voltage
(2)
I
OL
= +4mA, V
DDQ
= Min.
___
0.4 V
V
OH
(3.3V) Output High Voltage
(2 )
I
OH
= -4mA, V
DDQ
= Min. 2.4
___
V
V
OL
(2.5V) Output Low Voltage
(2)
I
OL
= +2mA, V
DDQ
= Min.
___
0.4 V
V
OH
(2.5V) Output High Voltage
(2 )
I
OH
= -2mA, V
DDQ
= Min. 2.0
___
V
5622 tbl 09
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(3)
(VDD = 3.3V ± 150mV)
NOTES:
1. At f = f
MAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, using "AC TEST CONDITIONS" at input
levels of GND to 3V.
2. f = 0 means no address or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. V
DD = 3.3V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 120mA (Typ).
5. CE
X = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDDQ - 0.2V
CE
X > VDDQ - 0.2V means CE0X > VDDQ - 0.2V or CE1X - 0.2V
"X" represents "L" for left port or "R" for right port.
70V631S10
Com'l Only
70V631S12
Com'l
& Ind
70V631S15
Com'l
Symbol Parameter Test Condition Version Typ.
(4)
Max. Typ.
(4)
Max. Typ.
(4)
Max. Unit
I
DD
Dynamic Operating
Current (Both
Ports Active)
CE
L
and CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
(1)
COM'L S 340 500 315 465 300 440
mA
IND S
____ ____
365 515
____ ____
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
= CE
R
= V
IH
f = f
MAX
(1)
COM'L S 115 165 90 125 75 100
mA
IND S
____ ____
115 150
____ ____
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(1)
COM'L S 225 340 200 325 175 315
mA
IND S
____ ____
225 365
____ ____
I
SB3
Full Standby Current
(Both Ports - CMOS
Level Inputs)
Both Ports CE
L
and
CE
R
> V
DDQ
- 0.2V,
V
IN
> V
DDQ
- 0.2V or V
IN
< 0.2V,
f = 0
(2)
COM'LS315315315
mA
IND S
____ ____
615
____ ____
I
SB4
Full Standby Current
(One Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DDQ
- 0.2V
(5)
V
IN
> V
DDQ
- 0.2V or V
IN
< 0.2V,
Active Port, Outputs Disabled,
f = f
MAX
(1)
COM'L S 220 335 195 320 170 310
mA
IND S
____ ____
220 360
____ ____
5622 tbl 10
9
IDT70V631S
High-Speed 3.3V 256K x 18 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
AC Test Conditions (VDDQ - 3.3V/2.5V)
Figure 1. AC Output Test load.
Figure 2. Output Test Load
(For t
CKLZ, tCKHZ, tOLZ, and tOHZ).
*Including scope and jig.
Figure 3. Typical Output Derating (Lumped Capacitive Load).
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V / GND to 2.5V
2ns Max.
1.5V/1.25V
1.5V/1.25V
Figures 1 and 2
5622 tbl 11
1.5V/1.25
50
50
5622 drw 03
10pF
(Tester)
DATA
OUT
,
5622 drw 04
590
5pF*
435
3.3V
DATA
OUT
,
833
5pF*
770
2.5V
DATA
OUT
,
-1
1
2
3
4
5
6
7
20.5
30
50 80 100 200
10.5pF is the I/O capacitance of this
device, and 10pF is the AC Test Load
Capacitance.
Capacitance (pF)
tAA
(Typical, ns)
5622 drw 05
,
Figure 2. Output Test Load

70V631S12PRF8

Mfr. #:
Manufacturer:
Description:
SRAM 256Kx18 STD-PWR 3.3V DUAL-PORT RAM
Lifecycle:
New from this manufacturer.
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